Re: [PATCH 1/2] arm: mvebu: clearfog gtr: add config option to select serdes0 interface

On 1/6/24 18:29, Josua Mayer wrote:

Clearfog GTR has an assembly option for a SATA connector, CON18. It shares the serdes with mini-pcie connector CON3.

Add new kconfig option to select betweenata and pci, defaulting to pci as it was previously configured in board-file.

Clearfog GTR connects eth2 / serdes 1 to a 2.5Gbps capable ethernet switch port. Linux already configures a fixed-link at speed 2500 from device-tree. Upgrade serdes 1 rate to 3.125Gbps to support a 2.5Gbps network link on Clearfog GTR.

Signed-off-by: Josua Mayer josua@solid-run.com

board/solidrun/clearfog/Kconfig | 19 +++++++++++++++++++ board/solidrun/clearfog/clearfog.c | 11 ++++++++--- 2 files changed, 27 insertions(+), 3 deletions(-)

diff --git a/board/solidrun/clearfog/Kconfig b/board/solidrun/clearfog/Kconfig index 60d3921307..765d8a6355 100644 --- a/board/solidrun/clearfog/Kconfig +++ b/board/solidrun/clearfog/Kconfig @@ -39,6 +39,25 @@ config CLEARFOG_SFP_25GB SGMII connection (requires a supporting SFP). By default, transfer speed of 1.25 Gbps is used, suitable for a more common 1 Gbps SFP module.

+choice CLEARFOG_GTR_SERDES0

• prompt "Select Clearfog GTR SerDes 0 Function"
• help

•  Select function for SerDes 0 which is shared between CON3 and CON18
  

•  for either pci-e or sata.
  

+config CLEARFOG_GTR_SERDES0_PCIE

• bool "PCI-E on CON3"
• default y

After applying this patch I get this warning:

board/solidrun/clearfog/Kconfig:50:warning: defaults for choice values not supported

Could you please take a look?

Thanks, Stefan

• help

•  Configure SerDes 0 for PCI-E to enable CON3 mini-PCI-E connector.
  

+config CLEARFOG_GTR_SERDES0_SATA

• bool "SATA on CON18"
• help

•  Configure SerDes 0 for SATA to enable CON18 SATA connector.
  

+endchoice

• config ENV_SIZE hex "Environment Size" default 0x10000

diff --git a/board/solidrun/clearfog/clearfog.c b/board/solidrun/clearfog/clearfog.c index 6fa2fe5fe3..51c5be518a 100644 --- a/board/solidrun/clearfog/clearfog.c +++ b/board/solidrun/clearfog/clearfog.c @@ -90,9 +90,14 @@ int hws_board_topology_load(struct serdes_map **serdes_map_array, u8 *count)

/* Apply runtime detection changes */ if (sr_product_is(&cf_tlv_data, "Clearfog GTR")) {

• board_serdes_map[0].serdes_type = PEX0;
  

• board_serdes_map[0].serdes_speed = SERDES_SPEED_5_GBPS;
  

• board_serdes_map[0].serdes_mode = PEX_ROOT_COMPLEX_X1;
  

• if (IS_ENABLED(CONFIG_CLEARFOG_GTR_SERDES0_SATA)) {
  

• 	/* serdes 0 is sata (like clearfog pro) */
  

• } else if (IS_ENABLED(CONFIG_CLEARFOG_GTR_SERDES0_PCIE)) {
  

• 	/* serdes 0 is pci */
  

• 	board_serdes_map[0].serdes_type = PEX0;
  

• 	board_serdes_map[0].serdes_speed = SERDES_SPEED_5_GBPS;
  

• 	board_serdes_map[0].serdes_mode = PEX_ROOT_COMPLEX_X1;
  

• }
  

  } else if (sr_product_is(&cf_tlv_data, "Clearfog Pro")) { /* handle recognized product as noop, no adjustment required */ } else if (sr_product_is(&cf_tlv_data, "Clearfog Base")) {

Viele Grüße, Stefan Roese