
On Fri, Jul 24, 2009 at 09:41:21AM -0500, Peter Tyser wrote:
On Fri, 2009-07-24 at 15:46 +0200, Wolfgang Denk wrote:
Dear Peter,
In message 20090723190101.C8F8A832E416@gemini.denx.de I wrote:
In message 1247269570-11406-1-git-send-email-ptyser@xes-inc.com you wrote:
Previously, non-e500 architectures only unlocked their data cache which was used as early RAM when booting to Linux using the "bootm" command. This change causes all PPC boards with CONFIG_SYS_INIT_RAM_LOCK defined to unlock their data cache during U-Boot's initialization. This improves U-Boot performance and provides a common cache state when booting to different OSes.
...
Hm... tested on TQM834x - it's still booting, but flash recognition stopped working:
I git-bisected the problem on TQM834x:
982adfc610669482a32127282fe489857a92cfe3 is first bad commit commit 982adfc610669482a32127282fe489857a92cfe3 Author: Peter Tyser ptyser@xes-inc.com Date: Fri Jul 10 18:46:10 2009 -0500
ppc: Unlock cache-as-ram in a consistent manner Previously, non-e500 architectures only unlocked their data cache which was used as early RAM when booting to Linux using the "bootm" command. This change causes all PPC boards with CONFIG_SYS_INIT_RAM_LOCK defined to unlock their data cache during U-Boot's initialization. This improves U-Boot performance and provides a common cache state when booting to different OSes. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
:040000 040000 bf1093b8403580234125df8e97d948c318e8965f 5dce3a5e28ea46706aba44ec62e88584883d0cc4 M lib_ppc
Please suggest how to continue. Shall I revert this commit?
Did you try making the change Kim suggested? Or backing out 9993e196da707a0a1cd4584f1fcef12382c1c144 completely as a test?
Does anyone else have an 83xx board they'd be willing to try booting with the current top of HEAD?
Sure. MPC8349EMDS eval board here. It fails to boot, giving the following output.
U-Boot 2009.06-00525-gf33b325 (Jul 24 2009 - 09:34:25) MPC83XX
Reset Status: Software Hard, External/Internal Soft, External/Internal Hard
CPU: e300c1, MPC8349EA, Rev: 3.0 at 528 MHz, CSB: 264 MHz Board: Freescale MPC8349EMDS I2C: ready SPI: ready DRAM: 256 MB (DDR1, 64-bit, ECC off, 264 MHz) FLASH: ## Unknown FLASH on Bank 1 - Size = 0x00000000 = 0 MB *** failed *** ### ERROR ### Please RESET the board ###
Thanks, Ira