Use data type u32/u16/u8 for regs and desc, as it is more portable.
Signed-off-by: Thomas Chou thomas@wytron.com.tw --- drivers/net/altera_tse.c | 16 ++-- drivers/net/altera_tse.h | 186 +++++++++++++++++++++++------------------------ 2 files changed, 101 insertions(+), 101 deletions(-)
diff --git a/drivers/net/altera_tse.c b/drivers/net/altera_tse.c index 319983c..394503f 100644 --- a/drivers/net/altera_tse.c +++ b/drivers/net/altera_tse.c @@ -27,12 +27,12 @@ static inline void alt_sgdma_construct_descriptor( struct alt_sgdma_descriptor *next, void *read_addr, void *write_addr, - unsigned short length_or_eop, + u16 length_or_eop, int generate_eop, int read_fixed, int write_fixed_or_sop) { - unsigned char val; + u8 val;
/* * Mark the "next" descriptor as "not" owned by hardware. This prevents @@ -100,7 +100,7 @@ static int alt_sgdma_wait_transfer(struct alt_sgdma_registers *regs) static int alt_sgdma_start_transfer(struct alt_sgdma_registers *regs, struct alt_sgdma_descriptor *desc) { - unsigned int val; + u32 val;
/* Point the controller at the descriptor */ writel(virt_to_phys(desc), ®s->next_descriptor_pointer); @@ -121,7 +121,7 @@ static void tse_adjust_link(struct altera_tse_priv *priv, struct phy_device *phydev) { struct alt_tse_mac *mac_dev = priv->mac_dev; - unsigned int refvar; + u32 refvar;
if (!phydev->link) { debug("%s: No link.\n", phydev->dev->name); @@ -230,7 +230,7 @@ static void altera_tse_stop(struct udevice *dev) struct alt_sgdma_registers *rx_sgdma = priv->sgdma_rx; struct alt_sgdma_registers *tx_sgdma = priv->sgdma_tx; struct alt_sgdma_descriptor *rx_desc = priv->rx_desc; - unsigned int status; + u32 status; int ret; ulong ctime;
@@ -266,7 +266,7 @@ static int tse_mdio_read(struct mii_dev *bus, int addr, int devad, int reg) { struct altera_tse_priv *priv = bus->priv; struct alt_tse_mac *mac_dev = priv->mac_dev; - unsigned int value; + u32 value;
/* set mdio address */ writel(addr, &mac_dev->mdio_phy1_addr); @@ -337,7 +337,7 @@ static int altera_tse_write_hwaddr(struct udevice *dev) struct alt_tse_mac *mac_dev = priv->mac_dev; struct eth_pdata *pdata = dev_get_platdata(dev); u8 *hwaddr = pdata->enetaddr; - unsigned int mac_lo, mac_hi; + u32 mac_lo, mac_hi;
mac_lo = (hwaddr[3] << 24) | (hwaddr[2] << 16) | (hwaddr[1] << 8) | hwaddr[0]; @@ -362,7 +362,7 @@ static int altera_tse_start(struct udevice *dev) { struct altera_tse_priv *priv = dev_get_priv(dev); struct alt_tse_mac *mac_dev = priv->mac_dev; - unsigned int val; + u32 val; int ret;
/* need to create sgdma */ diff --git a/drivers/net/altera_tse.h b/drivers/net/altera_tse.h index 08c4f66..83923bd 100644 --- a/drivers/net/altera_tse.h +++ b/drivers/net/altera_tse.h @@ -71,34 +71,34 @@ * */ struct alt_sgdma_descriptor { - unsigned int source; /* the address of data to be read. */ - unsigned int source_pad; + u32 source; /* the address of data to be read. */ + u32 source_pad;
- unsigned int destination; /* the address to write data */ - unsigned int destination_pad; + u32 destination; /* the address to write data */ + u32 destination_pad;
- unsigned int next; /* the next descriptor in the list. */ - unsigned int next_pad; + u32 next; /* the next descriptor in the list. */ + u32 next_pad;
- unsigned short bytes_to_transfer; /* the number of bytes to transfer */ - unsigned char read_burst; - unsigned char write_burst; + u16 bytes_to_transfer; /* the number of bytes to transfer */ + u8 read_burst; + u8 write_burst;
- unsigned short actual_bytes_transferred;/* bytes transferred by DMA */ - unsigned char descriptor_status; - unsigned char descriptor_control; + u16 actual_bytes_transferred;/* bytes transferred by DMA */ + u8 descriptor_status; + u8 descriptor_control;
} __packed_1_;
/* SG-DMA Control/Status Slave registers map */
struct alt_sgdma_registers { - unsigned int status; - unsigned int status_pad[3]; - unsigned int control; - unsigned int control_pad[3]; - unsigned int next_descriptor_pointer; - unsigned int descriptor_pad[3]; + u32 status; + u32 status_pad[3]; + u32 control; + u32 control_pad[3]; + u32 next_descriptor_pointer; + u32 descriptor_pad[3]; };
/* TSE Stuff */ @@ -142,101 +142,101 @@ struct alt_sgdma_registers { /* MAC register Space */
struct alt_tse_mac { - unsigned int megacore_revision; - unsigned int scratch_pad; - unsigned int command_config; - unsigned int mac_addr_0; - unsigned int mac_addr_1; - unsigned int max_frame_length; - unsigned int pause_quanta; - unsigned int rx_sel_empty_threshold; - unsigned int rx_sel_full_threshold; - unsigned int tx_sel_empty_threshold; - unsigned int tx_sel_full_threshold; - unsigned int rx_almost_empty_threshold; - unsigned int rx_almost_full_threshold; - unsigned int tx_almost_empty_threshold; - unsigned int tx_almost_full_threshold; - unsigned int mdio_phy0_addr; - unsigned int mdio_phy1_addr; + u32 megacore_revision; + u32 scratch_pad; + u32 command_config; + u32 mac_addr_0; + u32 mac_addr_1; + u32 max_frame_length; + u32 pause_quanta; + u32 rx_sel_empty_threshold; + u32 rx_sel_full_threshold; + u32 tx_sel_empty_threshold; + u32 tx_sel_full_threshold; + u32 rx_almost_empty_threshold; + u32 rx_almost_full_threshold; + u32 tx_almost_empty_threshold; + u32 tx_almost_full_threshold; + u32 mdio_phy0_addr; + u32 mdio_phy1_addr;
/* only if 100/1000 BaseX PCS, reserved otherwise */ - unsigned int reservedx44[5]; + u32 reservedx44[5];
- unsigned int reg_read_access_status; - unsigned int min_tx_ipg_length; + u32 reg_read_access_status; + u32 min_tx_ipg_length;
/* IEEE 802.3 oEntity Managed Object Support */ - unsigned int aMACID_1; /*The MAC addresses */ - unsigned int aMACID_2; - unsigned int aFramesTransmittedOK; - unsigned int aFramesReceivedOK; - unsigned int aFramesCheckSequenceErrors; - unsigned int aAlignmentErrors; - unsigned int aOctetsTransmittedOK; - unsigned int aOctetsReceivedOK; + u32 aMACID_1; /*The MAC addresses */ + u32 aMACID_2; + u32 aFramesTransmittedOK; + u32 aFramesReceivedOK; + u32 aFramesCheckSequenceErrors; + u32 aAlignmentErrors; + u32 aOctetsTransmittedOK; + u32 aOctetsReceivedOK;
/* IEEE 802.3 oPausedEntity Managed Object Support */ - unsigned int aTxPAUSEMACCtrlFrames; - unsigned int aRxPAUSEMACCtrlFrames; + u32 aTxPAUSEMACCtrlFrames; + u32 aRxPAUSEMACCtrlFrames;
/* IETF MIB (MIB-II) Object Support */ - unsigned int ifInErrors; - unsigned int ifOutErrors; - unsigned int ifInUcastPkts; - unsigned int ifInMulticastPkts; - unsigned int ifInBroadcastPkts; - unsigned int ifOutDiscards; - unsigned int ifOutUcastPkts; - unsigned int ifOutMulticastPkts; - unsigned int ifOutBroadcastPkts; + u32 ifInErrors; + u32 ifOutErrors; + u32 ifInUcastPkts; + u32 ifInMulticastPkts; + u32 ifInBroadcastPkts; + u32 ifOutDiscards; + u32 ifOutUcastPkts; + u32 ifOutMulticastPkts; + u32 ifOutBroadcastPkts;
/* IETF RMON MIB Object Support */ - unsigned int etherStatsDropEvent; - unsigned int etherStatsOctets; - unsigned int etherStatsPkts; - unsigned int etherStatsUndersizePkts; - unsigned int etherStatsOversizePkts; - unsigned int etherStatsPkts64Octets; - unsigned int etherStatsPkts65to127Octets; - unsigned int etherStatsPkts128to255Octets; - unsigned int etherStatsPkts256to511Octets; - unsigned int etherStatsPkts512to1023Octets; - unsigned int etherStatsPkts1024to1518Octets; - - unsigned int etherStatsPkts1519toXOctets; - unsigned int etherStatsJabbers; - unsigned int etherStatsFragments; - - unsigned int reservedxE4; + u32 etherStatsDropEvent; + u32 etherStatsOctets; + u32 etherStatsPkts; + u32 etherStatsUndersizePkts; + u32 etherStatsOversizePkts; + u32 etherStatsPkts64Octets; + u32 etherStatsPkts65to127Octets; + u32 etherStatsPkts128to255Octets; + u32 etherStatsPkts256to511Octets; + u32 etherStatsPkts512to1023Octets; + u32 etherStatsPkts1024to1518Octets; + + u32 etherStatsPkts1519toXOctets; + u32 etherStatsJabbers; + u32 etherStatsFragments; + + u32 reservedxE4;
/*FIFO control register. */ - unsigned int tx_cmd_stat; - unsigned int rx_cmd_stat; + u32 tx_cmd_stat; + u32 rx_cmd_stat;
- unsigned int ipaccTxConf; - unsigned int ipaccRxConf; - unsigned int ipaccRxStat; - unsigned int ipaccRxStatSum; + u32 ipaccTxConf; + u32 ipaccRxConf; + u32 ipaccRxStat; + u32 ipaccRxStatSum;
/*Multicast address resolution table */ - unsigned int hash_table[64]; + u32 hash_table[64];
/*Registers 0 to 31 within PHY device 0/1 */ - unsigned int mdio_phy0[0x20]; - unsigned int mdio_phy1[0x20]; + u32 mdio_phy0[0x20]; + u32 mdio_phy1[0x20];
/*4 Supplemental MAC Addresses */ - unsigned int supp_mac_addr_0_0; - unsigned int supp_mac_addr_0_1; - unsigned int supp_mac_addr_1_0; - unsigned int supp_mac_addr_1_1; - unsigned int supp_mac_addr_2_0; - unsigned int supp_mac_addr_2_1; - unsigned int supp_mac_addr_3_0; - unsigned int supp_mac_addr_3_1; - - unsigned int reservedx320[56]; + u32 supp_mac_addr_0_0; + u32 supp_mac_addr_0_1; + u32 supp_mac_addr_1_0; + u32 supp_mac_addr_1_1; + u32 supp_mac_addr_2_0; + u32 supp_mac_addr_2_1; + u32 supp_mac_addr_3_0; + u32 supp_mac_addr_3_1; + + u32 reservedx320[56]; };
struct altera_tse_priv {