Hi,
I am resending the patch with proper indentation. This patch is for SATA controllers of Intel processor with South bridge ICH5,ICH6 and ICH7. These chipsets don't support AHCI interface.
Code is divided in to two files. One file has functions which are specific to controller and another file which has functions, which are common to most of the Sata controllers.
Description of the Feature: Added a driver for SATA-controller of Intel processor with South Bridge, ICH-5, ICH-6 and ICH-7.
Implementation:
1. Code is divided in to two files. All functions, which are controller specific are kept in "drivers/ata_piix.c" file and functions, which are not controller specific, are kept in "common/cmd_sata.c" file. 2. Reading and Writing from the SATA drive is done using PIO method. 3. Driver can be configured for 48-bit addressing by defining macro CONFIG_LBA48, if this macro is not defined driver uses the 28-bit addressing. 4. SATA read function is hooked to the File system, commands like ext2ls and ext2load file can be used. This has been tested. 5. U-boot command "SATA_init" is added, which initializes the SATA controller and identifies the SATA drives connected to it. 6. U-boot command "SATA" is added, which is used to read/write, print partition table and get info about the drives present. This I have implemented in same way as "ide" command is implemented in u-boot. 7. This driver is for SATA in native mode. 8. This driver does not support the Native command queuing and Hot-plugging.