
Hi Paweł,
Similar to Linux the U-boot tree has scripts to check your patches. Could you fix some?
Johan
./scripts/checkpatch.pl --strict v5-0001-rockchip-rk3066-add-grf-header-file.patch WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #19: new file mode 100644
WARNING: Improper SPDX comment style for 'arch/arm/include/asm/arch-rockchip/grf_rk3066.h', please use '/*' instead #24: FILE: arch/arm/include/asm/arch-rockchip/grf_rk3066.h:1: +// SPDX-License-Identifier: GPL-2.0+
WARNING: Missing or malformed SPDX-License-Identifier tag in line 1 #24: FILE: arch/arm/include/asm/arch-rockchip/grf_rk3066.h:1: +// SPDX-License-Identifier: GPL-2.0+
CHECK: Please use a blank line after function/struct/union/enum declarations #93: FILE: arch/arm/include/asm/arch-rockchip/grf_rk3066.h:70: +}; +check_member(rk3066_grf, os_reg[3], 0x01d4);
ERROR: trailing whitespace #130: FILE: arch/arm/include/asm/arch-rockchip/grf_rk3066.h:107: +^I$
CHECK: Blank lines aren't necessary after an open brace '{' #182: FILE: arch/arm/include/asm/arch-rockchip/grf_rk3066.h:159: +enum { +
On 6/27/21 11:10 PM, Paweł Jarosz wrote:
grf is needed by various drivers for rk3066 soc.
Signed-off-by: Paweł Jarosz paweljarosz3691@gmail.com Acked-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
Changes since v1:
- updated to shifted masks
Changes since v2:
- none
Changes since v3:
- none
Changes since v4:
- removed gpio iomux related constants
.../include/asm/arch-rockchip/grf_rk3066.h | 211 ++++++++++++++++++ 1 file changed, 211 insertions(+) create mode 100644 arch/arm/include/asm/arch-rockchip/grf_rk3066.h
diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3066.h b/arch/arm/include/asm/arch-rockchip/grf_rk3066.h new file mode 100644 index 0000000000..b30fb29faa --- /dev/null +++ b/arch/arm/include/asm/arch-rockchip/grf_rk3066.h @@ -0,0 +1,211 @@ +// SPDX-License-Identifier: GPL-2.0+ +/*
- Copyright (c) 2021 Paweł Jarosz paweljarosz3691@gmail.com
- */
+#ifndef _ASM_ARCH_GRF_RK3066_H +#define _ASM_ARCH_GRF_RK3066_H
+struct rk3066_grf_gpio_lh {
- u32 l;
- u32 h;
+};
+struct rk3066_grf {
- struct rk3066_grf_gpio_lh gpio_dir[7];
- struct rk3066_grf_gpio_lh gpio_do[7];
- struct rk3066_grf_gpio_lh gpio_en[7];
- u32 gpio0a_iomux;
- u32 gpio0b_iomux;
- u32 gpio0c_iomux;
- u32 gpio0d_iomux;
- u32 gpio1a_iomux;
- u32 gpio1b_iomux;
- u32 gpio1c_iomux;
- u32 gpio1d_iomux;
- u32 gpio2a_iomux;
- u32 gpio2b_iomux;
- u32 gpio2c_iomux;
- u32 gpio2d_iomux;
- u32 gpio3a_iomux;
- u32 gpio3b_iomux;
- u32 gpio3c_iomux;
- u32 gpio3d_iomux;
- u32 gpio4a_iomux;
- u32 gpio4b_iomux;
- u32 gpio4c_iomux;
- u32 gpio4d_iomux;
- u32 reserved0[5];
- u32 gpio6b_iomux;
- u32 reserved1[2];
- struct rk3066_grf_gpio_lh gpio_pull[7];
- u32 soc_con0;
- u32 soc_con1;
- u32 soc_con2;
- u32 soc_status0;
- u32 dmac1_con[3];
- u32 dmac2_con[4];
- u32 uoc0_con[3];
- u32 uoc1_con[4];
- u32 ddrc_con;
- u32 ddrc_stat;
- u32 reserved2[10];
- u32 os_reg[4];
+}; +check_member(rk3066_grf, os_reg[3], 0x01d4);
+/* GRF_GPIO1B_IOMUX */ +enum {
- GPIO1B1_SHIFT = 2,
- GPIO1B1_MASK = 1 << GPIO1B1_SHIFT,
- GPIO1B1_GPIO = 0,
- GPIO1B1_UART2_SOUT,
- GPIO1B0_SHIFT = 0,
- GPIO1B0_MASK = 1 << GPIO1B0_SHIFT,
- GPIO1B0_GPIO = 0,
- GPIO1B0_UART2_SIN
+};
+/* GRF_SOC_CON0 */ +enum {
- SMC_MUX_CON_SHIFT = 13,
- SMC_MUX_CON_MASK = 1 << SMC_MUX_CON_SHIFT,
- NOC_REMAP_SHIFT = 12,
- NOC_REMAP_MASK = 1 << NOC_REMAP_SHIFT,
- EMMC_FLASH_SEL_SHIFT = 11,
- EMMC_FLASH_SEL_MASK = 1 << EMMC_FLASH_SEL_SHIFT,
- TZPC_REVISION_SHIFT = 7,
- TZPC_REVISION_MASK = 0xf << TZPC_REVISION_SHIFT,
- L2CACHE_ACC_SHIFT = 5,
- L2CACHE_ACC_MASK = 3 << L2CACHE_ACC_SHIFT,
- L2RD_WAIT_SHIFT = 3,
- L2RD_WAIT_MASK = 3 << L2RD_WAIT_SHIFT,
- IMEMRD_WAIT_SHIFT = 1,
- IMEMRD_WAIT_MASK = 3 << IMEMRD_WAIT_SHIFT,
remove TAB
git am v5-1-4-rockchip-rk3066-add-grf-header-file.patch Applying: rockchip: rk3066: add grf header file .git/rebase-apply/patch:131: trailing whitespace.
Use a editor (kate) that can remove trailing spaces on save.
- SOC_REMAP_SHIFT = 0,
- SOC_REMAP_MASK = 1 << SOC_REMAP_SHIFT,
+};
+/* GRF_SOC_CON1 */ +enum {
- RKI2C4_SEL_SHIFT = 15,
- RKI2C4_SEL_MASK = 1 << RKI2C4_SEL_SHIFT,
- RKI2C3_SEL_SHIFT = 14,
- RKI2C3_SEL_MASK = 1 << RKI2C3_SEL_SHIFT,
- RKI2C2_SEL_SHIFT = 13,
- RKI2C2_SEL_MASK = 1 << RKI2C2_SEL_SHIFT,
- RKI2C1_SEL_SHIFT = 12,
- RKI2C1_SEL_MASK = 1 << RKI2C1_SEL_SHIFT,
- RKI2C0_SEL_SHIFT = 11,
- RKI2C0_SEL_MASK = 1 << RKI2C0_SEL_SHIFT,
- VCODEC_SEL_SHIFT = 10,
- VCODEC_SEL_MASK = 1 << VCODEC_SEL_SHIFT,
- PERI_EMEM_PAUSE_SHIFT = 9,
- PERI_EMEM_PAUSE_MASK = 1 << PERI_EMEM_PAUSE_SHIFT,
- PERI_USB_PAUSE_SHIFT = 8,
- PERI_USB_PAUSE_MASK = 1 << PERI_USB_PAUSE_SHIFT,
- SMC_MUX_MODE_0_SHIFT = 6,
- SMC_MUX_MODE_0_MASK = 1 << SMC_MUX_MODE_0_SHIFT,
- SMC_SRAM_MW_0_SHIFT = 4,
- SMC_SRAM_MW_0_MASK = 3 << SMC_SRAM_MW_0_SHIFT,
- SMC_REMAP_0_SHIFT = 3,
- SMC_REMAP_0_MASK = 1 << SMC_REMAP_0_SHIFT,
- SMC_A_GT_M0_SYNC_SHIFT = 2,
- SMC_A_GT_M0_SYNC_MASK = 1 << SMC_A_GT_M0_SYNC_SHIFT,
- EMAC_SPEED_SHIFT = 1,
- EMAC_SPEEC_MASK = 1 << EMAC_SPEED_SHIFT,
- EMAC_MODE_SHIFT = 0,
- EMAC_MODE_MASK = 1 << EMAC_MODE_SHIFT,
+};
+/* GRF_SOC_CON2 */ +enum {
- MSCH4_MAINDDR3_SHIFT = 7,
- MSCH4_MAINDDR3_MASK = 1 << MSCH4_MAINDDR3_SHIFT,
- MSCH4_MAINDDR3_DDR3 = 1,
- EMAC_NEWRCV_EN_SHIFT = 6,
- EMAC_NEWRCV_EN_MASK = 1 << EMAC_NEWRCV_EN_SHIFT,
- SW_ADDR15_EN_SHIFT = 5,
- SW_ADDR15_EN_MASK = 1 << SW_ADDR15_EN_SHIFT,
- SW_ADDR16_EN_SHIFT = 4,
- SW_ADDR16_EN_MASK = 1 << SW_ADDR16_EN_SHIFT,
- SW_ADDR17_EN_SHIFT = 3,
- SW_ADDR17_EN_MASK = 1 << SW_ADDR17_EN_SHIFT,
- BANK2_TO_RANK_EN_SHIFT = 2,
- BANK2_TO_RANK_EN_MASK = 1 << BANK2_TO_RANK_EN_SHIFT,
- RANK_TO_ROW15_EN_SHIFT = 1,
- RANK_TO_ROW15_EN_MASK = 1 << RANK_TO_ROW15_EN_SHIFT,
- UPCTL_C_ACTIVE_IN_SHIFT = 0,
- UPCTL_C_ACTIVE_IN_MASK = 1 << UPCTL_C_ACTIVE_IN_SHIFT,
- UPCTL_C_ACTIVE_IN_MAY = 0,
- UPCTL_C_ACTIVE_IN_WILL,
+};
+/* GRF_DDRC_CON0 */ +enum {
- DTO_LB_SHIFT = 11,
- DTO_LB_MASK = 3 << DTO_LB_SHIFT,
- DTO_TE_SHIFT = 9,
- DTO_TE_MASK = 3 << DTO_TE_SHIFT,
- DTO_PDR_SHIFT = 7,
- DTO_PDR_MASK = 3 << DTO_PDR_SHIFT,
- DTO_PDD_SHIFT = 5,
- DTO_PDD_MASK = 3 << DTO_PDD_SHIFT,
- DTO_IOM_SHIFT = 3,
- DTO_IOM_MASK = 3 << DTO_IOM_SHIFT,
- DTO_OE_SHIFT = 1,
- DTO_OE_MASK = 3 << DTO_OE_SHIFT,
- ATO_AE_SHIFT = 0,
- ATO_AE_MASK = 1 << ATO_AE_SHIFT,
+}; +#endif