Hi Ayman,
On Monday 19 October 2009 18:19:47 ayman@elkhashab.com wrote:
Per your suggestion, we tried setting the delay (and observed a delay), but the outcome did not change. The BIST still got set to fail and caused the board to become unresponsive, and thus Linux fails the detection later. FWIW, we've tried both with and without switches in between with no change in the behavior. We observe the transactions on a lecroy pcie analyzer.
OK, thanks for reporting.
I suppose one question that lingers in my mind is why does u-boot do anything other than just configure the IO/MEM bars? Is there some specific reason it is touching the BIST controls?
Could you please check the 4xx PCIe code (cpu/ppc4xx/4xx_pcie.c), where exactly the BIST is "touched". A quick scan through the source didn't reveal such an access to me. Could be I missed it though.
Cheers, Stefan
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