The impedance of the QSPI PCB lines on the sama7g5ek is 50 Ohms. Align the output impedance of the QSPI0 HSIOs by setting a medium drive strength which corresponds to an impedance of 56 Ohms when VDD is in the 3.0V - 3.6V range. The high drive strength setting corresponds to an output impedance of 42 Ohms on the QSPI0 HSIOs. This is just a fine tunning. The memory that we have populated on sama7g5ek works fine even with high drive strength, but it's better to adjust it and use medium instead, in case some other flashes with higher frequencies are tested.
Suggested-by: Mihai Sain mihai.sain@microchip.com Signed-off-by: Tudor Ambarus tudor.ambarus@microchip.com --- arch/arm/dts/at91-sama7g5ek.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/at91-sama7g5ek.dts b/arch/arm/dts/at91-sama7g5ek.dts index 5313c6d160..ee46112b08 100644 --- a/arch/arm/dts/at91-sama7g5ek.dts +++ b/arch/arm/dts/at91-sama7g5ek.dts @@ -667,7 +667,7 @@ <PIN_PB21__QSPI0_INT>; bias-disable; slew-rate = <0>; - atmel,drive-strength = <ATMEL_PIO_DRVSTR_HI>; + atmel,drive-strength = <ATMEL_PIO_DRVSTR_ME>; };
pinctrl_sdmmc0_default: sdmmc0_default {