[PATCH] arm: dts: allwinner: sync from linux for RGMII RX/TX delay fixes

Sync over a subset of the AllWinner dts changes from Linux 5.11 for the RGMII RX/TX delay network fixes.

This pulls other bits in needed to sync the whole files, the bits are other minor fixes, or pieces of DT that don't affect U-Boot.

Signed-off-by: Peter Robinson pbrobinson@gmail.com ---

When booting using EBBR with a 5.10 kernel we end up with network issues on a number of the Allwinner devices as the U-Boot DT doesn't have the RGMII fixups. This is a partial sync of the affected devices and the any .dtsi bits needed so as to not tear up the linux DT's. Most of the rest of the changes appear pretty benign so I didn't feel it was too much of an issue.

arch/arm/dts/axp81x.dtsi | 9 + arch/arm/dts/sun50i-a64-bananapi-m64.dts | 10 +- arch/arm/dts/sun50i-a64-orangepi-win.dts | 10 +- arch/arm/dts/sun50i-a64-pine64-plus.dts | 2 +- arch/arm/dts/sun50i-a64-sopine-baseboard.dts | 10 +- arch/arm/dts/sun50i-a64.dtsi | 34 +- .../dts/sun50i-h5-bananapi-m2-plus-v1.2.dts | 1 + .../arm/dts/sun50i-h5-libretech-all-h5-cc.dts | 2 +- arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts | 2 +- arch/arm/dts/sun50i-h5-orangepi-pc2.dts | 23 +- arch/arm/dts/sun50i-h5-orangepi-prime.dts | 2 +- .../arm/dts/sun50i-h5-orangepi-zero-plus2.dts | 38 +++ arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts | 14 +- arch/arm/dts/sun7i-a20-bananapi.dts | 24 +- arch/arm/dts/sun7i-a20-bananapro.dts | 14 +- arch/arm/dts/sun7i-a20-cubieboard2.dts | 24 +- arch/arm/dts/sun7i-a20-cubietruck.dts | 14 +- arch/arm/dts/sun7i-a20-hummingbird.dts | 21 +- arch/arm/dts/sun7i-a20-i12-tvbox.dts | 12 +- arch/arm/dts/sun7i-a20-icnova-swac.dts | 15 +- arch/arm/dts/sun7i-a20-itead-ibox.dts | 4 +- arch/arm/dts/sun7i-a20-lamobo-r1.dts | 14 +- arch/arm/dts/sun7i-a20-m3.dts | 12 +- arch/arm/dts/sun7i-a20-olimex-som-evb.dts | 12 +- arch/arm/dts/sun7i-a20-olimex-som204-evb.dts | 24 +- arch/arm/dts/sun7i-a20-olinuxino-lime.dts | 30 +- arch/arm/dts/sun7i-a20-olinuxino-lime2.dts | 44 +-- arch/arm/dts/sun7i-a20-olinuxino-micro.dts | 30 +- arch/arm/dts/sun7i-a20-orangepi-mini.dts | 24 +- arch/arm/dts/sun7i-a20-orangepi.dts | 24 +- arch/arm/dts/sun7i-a20-pcduino3-nano.dts | 28 +- arch/arm/dts/sun7i-a20-pcduino3.dts | 24 +- arch/arm/dts/sun7i-a20-wexler-tab7200.dts | 12 +- arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts | 24 +- arch/arm/dts/sun7i-a20.dtsi | 218 +++++++++++- arch/arm/dts/sun8i-a83t-bananapi-m3.dts | 53 ++- arch/arm/dts/sun8i-a83t-cubietruck-plus.dts | 71 +++- arch/arm/dts/sun8i-a83t.dtsi | 310 ++++++++++++++++-- arch/arm/dts/sun8i-h3-orangepi-pc-plus.dts | 5 - arch/arm/dts/sun8i-h3-orangepi-plus2e.dts | 2 +- arch/arm/dts/sun8i-h3-orangepi-zero-plus2.dts | 38 +++ arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts | 12 +- arch/arm/dts/sunxi-bananapi-m2-plus.dtsi | 2 +- 43 files changed, 947 insertions(+), 351 deletions(-)

diff --git a/arch/arm/dts/axp81x.dtsi b/arch/arm/dts/axp81x.dtsi index 043c717dce..1dfeeceabf 100644 --- a/arch/arm/dts/axp81x.dtsi +++ b/arch/arm/dts/axp81x.dtsi @@ -48,6 +48,11 @@ interrupt-controller; #interrupt-cells = <1>;

+ ac_power_supply: ac-power-supply { + compatible = "x-powers,axp813-ac-power-supply"; + status = "disabled"; + }; + axp_adc: adc { compatible = "x-powers,axp813-adc"; #io-channel-cells = <1>; @@ -166,4 +171,8 @@ status = "disabled"; }; }; + + usb_power_supply: usb-power-supply { + compatible = "x-powers,axp813-usb-power-supply"; + }; }; diff --git a/arch/arm/dts/sun50i-a64-bananapi-m64.dts b/arch/arm/dts/sun50i-a64-bananapi-m64.dts index 883f217efb..e5e840b9fb 100644 --- a/arch/arm/dts/sun50i-a64-bananapi-m64.dts +++ b/arch/arm/dts/sun50i-a64-bananapi-m64.dts @@ -105,7 +105,7 @@ &emac { pinctrl-names = "default"; pinctrl-0 = <&rgmii_pins>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; phy-handle = <&ext_rgmii_phy>; phy-supply = <&reg_dc1sw>; status = "okay"; @@ -331,10 +331,10 @@ "Microphone", "Microphone Jack", "Microphone", "Onboard Microphone"; simple-audio-card,routing = - "Left DAC", "AIF1 Slot 0 Left", - "Right DAC", "AIF1 Slot 0 Right", - "AIF1 Slot 0 Left ADC", "Left ADC", - "AIF1 Slot 0 Right ADC", "Right ADC", + "Left DAC", "DACL", + "Right DAC", "DACR", + "ADCL", "Left ADC", + "ADCR", "Right ADC", "Headphone Jack", "HP", "MIC2", "Microphone Jack", "Onboard Microphone", "MBIAS", diff --git a/arch/arm/dts/sun50i-a64-orangepi-win.dts b/arch/arm/dts/sun50i-a64-orangepi-win.dts index fde9c7a99b..70e31743f0 100644 --- a/arch/arm/dts/sun50i-a64-orangepi-win.dts +++ b/arch/arm/dts/sun50i-a64-orangepi-win.dts @@ -120,7 +120,7 @@ &emac { pinctrl-names = "default"; pinctrl-0 = <&rgmii_pins>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; phy-handle = <&ext_rgmii_phy>; phy-supply = <&reg_gmac_3v3>; status = "okay"; @@ -330,10 +330,10 @@ "Microphone", "Microphone Jack", "Microphone", "Onboard Microphone"; simple-audio-card,routing = - "Left DAC", "AIF1 Slot 0 Left", - "Right DAC", "AIF1 Slot 0 Right", - "AIF1 Slot 0 Left ADC", "Left ADC", - "AIF1 Slot 0 Right ADC", "Right ADC", + "Left DAC", "DACL", + "Right DAC", "DACR", + "ADCL", "Left ADC", + "ADCR", "Right ADC", "Headphone Jack", "HP", "MIC2", "Microphone Jack", "Onboard Microphone", "MBIAS", diff --git a/arch/arm/dts/sun50i-a64-pine64-plus.dts b/arch/arm/dts/sun50i-a64-pine64-plus.dts index b26181cf90..b54099b654 100644 --- a/arch/arm/dts/sun50i-a64-pine64-plus.dts +++ b/arch/arm/dts/sun50i-a64-pine64-plus.dts @@ -13,7 +13,7 @@ &emac { pinctrl-names = "default"; pinctrl-0 = <&rgmii_pins>; - phy-mode = "rgmii"; + phy-mode = "rgmii-txid"; phy-handle = <&ext_rgmii_phy>; status = "okay"; }; diff --git a/arch/arm/dts/sun50i-a64-sopine-baseboard.dts b/arch/arm/dts/sun50i-a64-sopine-baseboard.dts index 2f6ea9f3f6..d4069749d7 100644 --- a/arch/arm/dts/sun50i-a64-sopine-baseboard.dts +++ b/arch/arm/dts/sun50i-a64-sopine-baseboard.dts @@ -79,7 +79,7 @@ &emac { pinctrl-names = "default"; pinctrl-0 = <&rgmii_pins>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; phy-handle = <&ext_rgmii_phy>; phy-supply = <&reg_dc1sw>; status = "okay"; @@ -159,11 +159,11 @@ simple-audio-card,widgets = "Microphone", "Microphone Jack", "Headphone", "Headphone Jack"; simple-audio-card,routing = - "Left DAC", "AIF1 Slot 0 Left", - "Right DAC", "AIF1 Slot 0 Right", + "Left DAC", "DACL", + "Right DAC", "DACR", "Headphone Jack", "HP", - "AIF1 Slot 0 Left ADC", "Left ADC", - "AIF1 Slot 0 Right ADC", "Right ADC", + "ADCL", "Left ADC", + "ADCR", "Right ADC", "MIC2", "Microphone Jack"; status = "okay"; }; diff --git a/arch/arm/dts/sun50i-a64.dtsi b/arch/arm/dts/sun50i-a64.dtsi index 8dfbcd1440..51cc30e84e 100644 --- a/arch/arm/dts/sun50i-a64.dtsi +++ b/arch/arm/dts/sun50i-a64.dtsi @@ -51,7 +51,7 @@ reg = <0>; enable-method = "psci"; next-level-cache = <&L2>; - clocks = <&ccu 21>; + clocks = <&ccu CLK_CPUX>; clock-names = "cpu"; #cooling-cells = <2>; }; @@ -62,7 +62,7 @@ reg = <1>; enable-method = "psci"; next-level-cache = <&L2>; - clocks = <&ccu 21>; + clocks = <&ccu CLK_CPUX>; clock-names = "cpu"; #cooling-cells = <2>; }; @@ -73,7 +73,7 @@ reg = <2>; enable-method = "psci"; next-level-cache = <&L2>; - clocks = <&ccu 21>; + clocks = <&ccu CLK_CPUX>; clock-names = "cpu"; #cooling-cells = <2>; }; @@ -84,7 +84,7 @@ reg = <3>; enable-method = "psci"; next-level-cache = <&L2>; - clocks = <&ccu 21>; + clocks = <&ccu CLK_CPUX>; clock-names = "cpu"; #cooling-cells = <2>; }; @@ -139,10 +139,10 @@ simple-audio-card,mclk-fs = <128>; simple-audio-card,aux-devs = <&codec_analog>; simple-audio-card,routing = - "Left DAC", "AIF1 Slot 0 Left", - "Right DAC", "AIF1 Slot 0 Right", - "AIF1 Slot 0 Left ADC", "Left ADC", - "AIF1 Slot 0 Right ADC", "Right ADC"; + "Left DAC", "DACL", + "Right DAC", "DACR", + "ADCL", "Left ADC", + "ADCR", "Right ADC"; status = "disabled";

cpudai: simple-audio-card,cpu { @@ -157,6 +157,7 @@ timer { compatible = "arm,armv8-timer"; allwinner,erratum-unknown1; + arm,no-tick-in-suspend; interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>, <GIC_PPI 14 @@ -845,6 +846,20 @@ status = "disabled"; };

+ i2s2: i2s@1c22800 { + #sound-dai-cells = <0>; + compatible = "allwinner,sun50i-a64-i2s", + "allwinner,sun8i-h3-i2s"; + reg = <0x01c22800 0x400>; + interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_I2S2>, <&ccu CLK_I2S2>; + clock-names = "apb", "mod"; + resets = <&ccu RST_BUS_I2S2>; + dma-names = "rx", "tx"; + dmas = <&dma 27>, <&dma 27>; + status = "disabled"; + }; + dai: dai@1c22c00 { #sound-dai-cells = <0>; compatible = "allwinner,sun50i-a64-codec-i2s"; @@ -860,7 +875,8 @@

codec: codec@1c22e00 { #sound-dai-cells = <0>; - compatible = "allwinner,sun8i-a33-codec"; + compatible = "allwinner,sun50i-a64-codec", + "allwinner,sun8i-a33-codec"; reg = <0x01c22e00 0x600>; interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>; diff --git a/arch/arm/dts/sun50i-h5-bananapi-m2-plus-v1.2.dts b/arch/arm/dts/sun50i-h5-bananapi-m2-plus-v1.2.dts index 2e2b14c0ae..8857a37915 100644 --- a/arch/arm/dts/sun50i-h5-bananapi-m2-plus-v1.2.dts +++ b/arch/arm/dts/sun50i-h5-bananapi-m2-plus-v1.2.dts @@ -3,6 +3,7 @@

/dts-v1/; #include "sun50i-h5.dtsi" +#include "sun50i-h5-cpu-opp.dtsi" #include <arm/sunxi-bananapi-m2-plus-v1.2.dtsi>

/ { diff --git a/arch/arm/dts/sun50i-h5-libretech-all-h5-cc.dts b/arch/arm/dts/sun50i-h5-libretech-all-h5-cc.dts index df1b9263ad..6e30a564c8 100644 --- a/arch/arm/dts/sun50i-h5-libretech-all-h5-cc.dts +++ b/arch/arm/dts/sun50i-h5-libretech-all-h5-cc.dts @@ -36,7 +36,7 @@ pinctrl-0 = <&emac_rgmii_pins>; phy-supply = <&reg_gmac_3v3>; phy-handle = <&ext_rgmii_phy>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; /delete-property/ allwinner,leds-active-low; status = "okay"; }; diff --git a/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts b/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts index 4f9ba53ffa..9d93fe1536 100644 --- a/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts +++ b/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts @@ -96,7 +96,7 @@ pinctrl-0 = <&emac_rgmii_pins>; phy-supply = <&reg_gmac_3v3>; phy-handle = <&ext_rgmii_phy>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; status = "okay"; };

diff --git a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts index 70b5f09984..8bf2db9dcb 100644 --- a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts +++ b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts @@ -61,6 +61,7 @@ label = "sw4"; linux,code = <BTN_0>; gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; + wakeup-source; }; };

@@ -93,6 +94,10 @@ status = "okay"; };

+&cpu0 { + cpu-supply = <&reg_vdd_cpux>; +}; + &de { status = "okay"; }; @@ -118,7 +123,7 @@ pinctrl-0 = <&emac_rgmii_pins>; phy-supply = <&reg_gmac_3v3>; phy-handle = <&ext_rgmii_phy>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; status = "okay"; };

@@ -168,6 +173,22 @@ status = "okay"; };

+&r_i2c { + status = "okay"; + + reg_vdd_cpux: regulator@65 { + compatible = "silergy,sy8106a"; + reg = <0x65>; + regulator-name = "vdd-cpux"; + silergy,fixed-microvolt = <1100000>; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1400000>; + regulator-ramp-delay = <200>; + regulator-boot-on; + regulator-always-on; + }; +}; + &spi0 { status = "okay";

diff --git a/arch/arm/dts/sun50i-h5-orangepi-prime.dts b/arch/arm/dts/sun50i-h5-orangepi-prime.dts index cb44bfa598..33ab44072e 100644 --- a/arch/arm/dts/sun50i-h5-orangepi-prime.dts +++ b/arch/arm/dts/sun50i-h5-orangepi-prime.dts @@ -124,7 +124,7 @@ pinctrl-0 = <&emac_rgmii_pins>; phy-supply = <&reg_gmac_3v3>; phy-handle = <&ext_rgmii_phy>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; status = "okay"; };

diff --git a/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts b/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts index c95a685413..de19e68eb8 100644 --- a/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts +++ b/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts @@ -30,6 +30,21 @@ }; };

+ leds { + compatible = "gpio-leds"; + + pwr { + label = "orangepi:green:pwr"; + gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; + + status { + label = "orangepi:red:status"; + gpios = <&pio 0 17 GPIO_ACTIVE_HIGH>; + }; + }; + reg_vcc3v3: vcc3v3 { compatible = "regulator-fixed"; regulator-name = "vcc3v3"; @@ -48,6 +63,10 @@ status = "okay"; };

+&ehci0 { + status = "okay"; +}; + &hdmi { status = "okay"; }; @@ -92,6 +111,10 @@ status = "okay"; };

+&ohci0 { + status = "okay"; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pa_pins>; @@ -103,3 +126,18 @@ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; status = "okay"; }; + +&usb_otg { + /* + * According to schematics CN1 MicroUSB port can be used to take + * external 5V to power up the board VBUS. On the contrary CN1 MicroUSB + * port cannot provide power externally even if the board is powered + * via GPIO pins. It thus makes sense to force peripheral mode. + */ + dr_mode = "peripheral"; + status = "okay"; +}; + +&usbphy { + status = "okay"; +}; diff --git a/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts b/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts index e2bfe00588..8945dbb114 100644 --- a/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts +++ b/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts @@ -129,14 +129,10 @@ &gmac { pinctrl-names = "default"; pinctrl-0 = <&gmac_rgmii_pins>; - phy = <&phy1>; - phy-mode = "rgmii"; + phy-handle = <&phy1>; + phy-mode = "rgmii-id"; phy-supply = <&reg_gmac_3v3>; status = "okay"; - - phy1: ethernet-phy@1 { - reg = <1>; - }; };

&hdmi { @@ -171,6 +167,12 @@ status = "okay"; };

+&gmac_mdio { + phy1: ethernet-phy@1 { + reg = <1>; + }; +}; + &mmc0 { vmmc-supply = <&reg_vcc3v3>; bus-width = <4>; diff --git a/arch/arm/dts/sun7i-a20-bananapi.dts b/arch/arm/dts/sun7i-a20-bananapi.dts index 81bc85d398..0b3d9ae756 100644 --- a/arch/arm/dts/sun7i-a20-bananapi.dts +++ b/arch/arm/dts/sun7i-a20-bananapi.dts @@ -131,14 +131,10 @@ &gmac { pinctrl-names = "default"; pinctrl-0 = <&gmac_rgmii_pins>; - phy = <&phy1>; - phy-mode = "rgmii"; + phy-handle = <&phy1>; + phy-mode = "rgmii-id"; phy-supply = <&reg_gmac_3v3>; status = "okay"; - - phy1: ethernet-phy@1 { - reg = <1>; - }; };

&hdmi { @@ -171,6 +167,12 @@ status = "okay"; };

+&gmac_mdio { + phy1: ethernet-phy@1 { + reg = <1>; + }; +}; + &mmc0 { vmmc-supply = <&reg_vcc3v3>; bus-width = <4>; @@ -246,12 +248,6 @@ "SPI-MISO", "SPI-CE1", "", "IO-6", "IO-3", "IO-2", "IO-0", "", "", "", "", "", "", "", "", "", "", "", ""; - - usb0_id_detect_pin: usb0-id-detect-pin { - pins = "PH4"; - function = "gpio_in"; - bias-pull-up; - }; };

#include "axp209.dtsi" @@ -329,9 +325,7 @@ };

&usbphy { - pinctrl-names = "default"; - pinctrl-0 = <&usb0_id_detect_pin>; - usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ + usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ usb0_vbus_power-supply = <&usb_power_supply>; usb0_vbus-supply = <&reg_usb0_vbus>; usb1_vbus-supply = <&reg_usb1_vbus>; diff --git a/arch/arm/dts/sun7i-a20-bananapro.dts b/arch/arm/dts/sun7i-a20-bananapro.dts index 0176e9de01..5740f94427 100644 --- a/arch/arm/dts/sun7i-a20-bananapro.dts +++ b/arch/arm/dts/sun7i-a20-bananapro.dts @@ -109,14 +109,10 @@ &gmac { pinctrl-names = "default"; pinctrl-0 = <&gmac_rgmii_pins>; - phy = <&phy1>; - phy-mode = "rgmii"; + phy-handle = <&phy1>; + phy-mode = "rgmii-id"; phy-supply = <&reg_gmac_3v3>; status = "okay"; - - phy1: ethernet-phy@1 { - reg = <1>; - }; };

&i2c0 { @@ -143,6 +139,12 @@ status = "okay"; };

+&gmac_mdio { + phy1: ethernet-phy@1 { + reg = <1>; + }; +}; + &mmc0 { vmmc-supply = <&reg_vcc3v3>; bus-width = <4>; diff --git a/arch/arm/dts/sun7i-a20-cubieboard2.dts b/arch/arm/dts/sun7i-a20-cubieboard2.dts index 200685b0b1..b8203e4ef2 100644 --- a/arch/arm/dts/sun7i-a20-cubieboard2.dts +++ b/arch/arm/dts/sun7i-a20-cubieboard2.dts @@ -115,13 +115,9 @@ &gmac { pinctrl-names = "default"; pinctrl-0 = <&gmac_mii_pins>; - phy = <&phy1>; + phy-handle = <&phy1>; phy-mode = "mii"; status = "okay"; - - phy1: ethernet-phy@1 { - reg = <1>; - }; };

&hdmi { @@ -161,6 +157,12 @@ status = "okay"; };

+&gmac_mdio { + phy1: ethernet-phy@1 { + reg = <1>; + }; +}; + &ohci0 { status = "okay"; }; @@ -173,14 +175,6 @@ status = "okay"; };

-&pio { - usb0_id_detect_pin: usb0-id-detect-pin { - pins = "PH4"; - function = "gpio_in"; - bias-pull-up; - }; -}; - &reg_ahci_5v { status = "okay"; }; @@ -236,9 +230,7 @@ };

&usbphy { - pinctrl-names = "default"; - pinctrl-0 = <&usb0_id_detect_pin>; - usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ + usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ usb1_vbus-supply = <&reg_usb1_vbus>; usb2_vbus-supply = <&reg_usb2_vbus>; status = "okay"; diff --git a/arch/arm/dts/sun7i-a20-cubietruck.dts b/arch/arm/dts/sun7i-a20-cubietruck.dts index 99f531b8d2..9109ca0919 100644 --- a/arch/arm/dts/sun7i-a20-cubietruck.dts +++ b/arch/arm/dts/sun7i-a20-cubietruck.dts @@ -150,13 +150,9 @@ &gmac { pinctrl-names = "default"; pinctrl-0 = <&gmac_rgmii_pins>; - phy = <&phy1>; - phy-mode = "rgmii"; + phy-handle = <&phy1>; + phy-mode = "rgmii-id"; status = "okay"; - - phy1: ethernet-phy@1 { - reg = <1>; - }; };

&hdmi { @@ -194,6 +190,12 @@ status = "okay"; };

+&gmac_mdio { + phy1: ethernet-phy@1 { + reg = <1>; + }; +}; + &mmc0 { vmmc-supply = <&reg_vcc3v3>; bus-width = <4>; diff --git a/arch/arm/dts/sun7i-a20-hummingbird.dts b/arch/arm/dts/sun7i-a20-hummingbird.dts index fd0153f656..3def2a3305 100644 --- a/arch/arm/dts/sun7i-a20-hummingbird.dts +++ b/arch/arm/dts/sun7i-a20-hummingbird.dts @@ -100,19 +100,10 @@ &gmac { pinctrl-names = "default"; pinctrl-0 = <&gmac_rgmii_pins>; - phy = <&phy1>; + phy-handle = <&phy1>; phy-mode = "rgmii"; phy-supply = <&reg_gmac_vdd>; - /* phy reset config */ - snps,reset-gpio = <&pio 0 17 GPIO_ACTIVE_HIGH>; /* PA17 */ - snps,reset-active-low; - /* wait 1s after reset, otherwise fail to read phy id */ - snps,reset-delays-us = <0 10000 1000000>; status = "okay"; - - phy1: ethernet-phy@1 { - reg = <1>; - }; };

&i2c0 { @@ -146,6 +137,16 @@ status = "okay"; };

+&gmac_mdio { + phy1: ethernet-phy@1 { + reg = <1>; + reset-gpios = <&pio 0 17 GPIO_ACTIVE_LOW>; /* PA17 */ + reset-assert-us = <10000>; + /* wait 1s after reset, otherwise fail to read phy id */ + reset-deassert-us = <1000000>; + }; +}; + &mmc0 { vmmc-supply = <&reg_vcc3v0>; bus-width = <4>; diff --git a/arch/arm/dts/sun7i-a20-i12-tvbox.dts b/arch/arm/dts/sun7i-a20-i12-tvbox.dts index 5f1c4f573d..358ed5f1b1 100644 --- a/arch/arm/dts/sun7i-a20-i12-tvbox.dts +++ b/arch/arm/dts/sun7i-a20-i12-tvbox.dts @@ -115,14 +115,10 @@ &gmac { pinctrl-names = "default"; pinctrl-0 = <&gmac_mii_pins>; - phy = <&phy1>; + phy-handle = <&phy1>; phy-mode = "mii"; phy-supply = <&reg_gmac_3v3>; status = "okay"; - - phy1: ethernet-phy@1 { - reg = <1>; - }; };

&i2c0 { @@ -145,6 +141,12 @@ status = "okay"; };

+&gmac_mdio { + phy1: ethernet-phy@1 { + reg = <1>; + }; +}; + &mmc0 { vmmc-supply = <&reg_vcc3v3>; bus-width = <4>; diff --git a/arch/arm/dts/sun7i-a20-icnova-swac.dts b/arch/arm/dts/sun7i-a20-icnova-swac.dts index 949494730a..413505f45a 100644 --- a/arch/arm/dts/sun7i-a20-icnova-swac.dts +++ b/arch/arm/dts/sun7i-a20-icnova-swac.dts @@ -49,7 +49,8 @@

/ { model = "ICnova-A20 SWAC"; - compatible = "swac,icnova-a20-swac", "incircuit,icnova-a20", "allwinner,sun7i-a20"; + compatible = "incircuit,icnova-a20-swac", "incircuit,icnova-a20", + "allwinner,sun7i-a20";

aliases { serial0 = &uart0; @@ -75,13 +76,9 @@ &gmac { pinctrl-names = "default"; pinctrl-0 = <&gmac_mii_pins>; - phy = <&phy1>; + phy-handle = <&phy1>; phy-mode = "mii"; status = "okay"; - - phy1: ethernet-phy@1 { - reg = <1>; - }; };

&i2c0 { @@ -98,6 +95,12 @@ status = "okay"; };

+&gmac_mdio { + phy1: ethernet-phy@1 { + reg = <1>; + }; +}; + &mmc0 { vmmc-supply = <&reg_vcc3v3>; bus-width = <4>; diff --git a/arch/arm/dts/sun7i-a20-itead-ibox.dts b/arch/arm/dts/sun7i-a20-itead-ibox.dts index b90a7607d0..946c272783 100644 --- a/arch/arm/dts/sun7i-a20-itead-ibox.dts +++ b/arch/arm/dts/sun7i-a20-itead-ibox.dts @@ -97,10 +97,12 @@ &gmac { pinctrl-names = "default"; pinctrl-0 = <&gmac_mii_pins>; - phy = <&phy1>; + phy-handle = <&phy1>; phy-mode = "mii"; status = "okay"; +};

+&gmac_mdio { phy1: ethernet-phy@1 { reg = <1>; }; diff --git a/arch/arm/dts/sun7i-a20-lamobo-r1.dts b/arch/arm/dts/sun7i-a20-lamobo-r1.dts index f91e1bee44..17fa8901fc 100644 --- a/arch/arm/dts/sun7i-a20-lamobo-r1.dts +++ b/arch/arm/dts/sun7i-a20-lamobo-r1.dts @@ -123,8 +123,6 @@ phy-mode = "rgmii"; phy-supply = <&reg_gmac_3v3>; status = "okay"; - /delete-property/#address-cells; - /delete-property/#size-cells;

fixed-link { speed = <1000>; @@ -229,14 +227,6 @@ status = "okay"; };

-&pio { - usb0_id_detect_pin: usb0-id-detect-pin { - pins = "PH4"; - function = "gpio_in"; - bias-pull-up; - }; -}; - #include "axp209.dtsi"

&ac_power_supply { @@ -322,9 +312,7 @@ };

&usbphy { - pinctrl-names = "default"; - pinctrl-0 = <&usb0_id_detect_pin>; - usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ + usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ usb0_vbus_power-supply = <&usb_power_supply>; usb0_vbus-supply = <&reg_usb0_vbus>; usb2_vbus-supply = <&reg_usb2_vbus>; diff --git a/arch/arm/dts/sun7i-a20-m3.dts b/arch/arm/dts/sun7i-a20-m3.dts index b8a1aaaf39..6bff9e731f 100644 --- a/arch/arm/dts/sun7i-a20-m3.dts +++ b/arch/arm/dts/sun7i-a20-m3.dts @@ -82,13 +82,9 @@ &gmac { pinctrl-names = "default"; pinctrl-0 = <&gmac_mii_pins>; - phy = <&phy1>; + phy-handle = <&phy1>; phy-mode = "mii"; status = "okay"; - - phy1: ethernet-phy@1 { - reg = <1>; - }; };

&i2c0 { @@ -111,6 +107,12 @@ status = "okay"; };

+&gmac_mdio { + phy1: ethernet-phy@1 { + reg = <1>; + }; +}; + &mmc0 { vmmc-supply = <&reg_vcc3v3>; bus-width = <4>; diff --git a/arch/arm/dts/sun7i-a20-olimex-som-evb.dts b/arch/arm/dts/sun7i-a20-olimex-som-evb.dts index f0e6a96e57..6f9c54b8e4 100644 --- a/arch/arm/dts/sun7i-a20-olimex-som-evb.dts +++ b/arch/arm/dts/sun7i-a20-olimex-som-evb.dts @@ -111,13 +111,9 @@ &gmac { pinctrl-names = "default"; pinctrl-0 = <&gmac_rgmii_pins>; - phy = <&phy1>; + phy-handle = <&phy1>; phy-mode = "rgmii"; status = "okay"; - - phy1: ethernet-phy@1 { - reg = <1>; - }; };

&hdmi { @@ -202,6 +198,12 @@ }; };

+&gmac_mdio { + phy1: ethernet-phy@1 { + reg = <1>; + }; +}; + &mmc0 { vmmc-supply = <&reg_vcc3v3>; bus-width = <4>; diff --git a/arch/arm/dts/sun7i-a20-olimex-som204-evb.dts b/arch/arm/dts/sun7i-a20-olimex-som204-evb.dts index 823aabce04..230d62a6b8 100644 --- a/arch/arm/dts/sun7i-a20-olimex-som204-evb.dts +++ b/arch/arm/dts/sun7i-a20-olimex-som204-evb.dts @@ -105,18 +105,10 @@ &gmac { pinctrl-names = "default"; pinctrl-0 = <&gmac_rgmii_pins>; - phy = <&phy3>; + phy-handle = <&phy3>; phy-mode = "rgmii"; phy-supply = <&reg_vcc3v3>; - - snps,reset-gpio = <&pio 0 17 GPIO_ACTIVE_HIGH>; - snps,reset-active-low; - snps,reset-delays-us = <0 10000 1000000>; status = "okay"; - - phy3: ethernet-phy@3 { - reg = <3>; - }; };

&hdmi { @@ -161,6 +153,16 @@ status = "okay"; };

+&gmac_mdio { + phy3: ethernet-phy@3 { + reg = <3>; + reset-gpios = <&pio 0 17 GPIO_ACTIVE_LOW>; /* PA17 */ + reset-assert-us = <10000>; + /* wait 1s after reset, otherwise fail to read phy id */ + reset-deassert-us = <1000000>; + }; +}; + &mmc0 { vmmc-supply = <&reg_vcc3v3>; bus-width = <4>; @@ -314,8 +316,8 @@ };

&usbphy { - usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ - usb0_vbus_det-gpio = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ + usb0_id_det-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ + usb0_vbus_det-gpios = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ usb0_vbus_power-supply = <&usb_power_supply>; usb0_vbus-supply = <&reg_usb0_vbus>; usb1_vbus-supply = <&reg_usb1_vbus>; diff --git a/arch/arm/dts/sun7i-a20-olinuxino-lime.dts b/arch/arm/dts/sun7i-a20-olinuxino-lime.dts index 5e411194bf..2adbac8601 100644 --- a/arch/arm/dts/sun7i-a20-olinuxino-lime.dts +++ b/arch/arm/dts/sun7i-a20-olinuxino-lime.dts @@ -106,13 +106,9 @@ &gmac { pinctrl-names = "default"; pinctrl-0 = <&gmac_mii_pins>; - phy = <&phy1>; + phy-handle = <&phy1>; phy-mode = "mii"; status = "okay"; - - phy1: ethernet-phy@1 { - reg = <1>; - }; };

&hdmi { @@ -149,6 +145,12 @@ }; };

+&gmac_mdio { + phy1: ethernet-phy@1 { + reg = <1>; + }; +}; + &mmc0 { vmmc-supply = <&reg_vcc3v3>; bus-width = <4>; @@ -174,18 +176,6 @@ function = "gpio_out"; drive-strength = <20>; }; - - usb0_id_detect_pin: usb0-id-detect-pin { - pins = "PH4"; - function = "gpio_in"; - bias-pull-up; - }; - - usb0_vbus_detect_pin: usb0-vbus-detect-pin { - pins = "PH5"; - function = "gpio_in"; - bias-pull-down; - }; };

&reg_ahci_5v { @@ -217,10 +207,8 @@ };

&usbphy { - pinctrl-names = "default"; - pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; - usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ - usb0_vbus_det-gpio = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ + usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ + usb0_vbus_det-gpios = <&pio 7 5 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* PH5 */ usb0_vbus-supply = <&reg_usb0_vbus>; usb1_vbus-supply = <&reg_usb1_vbus>; usb2_vbus-supply = <&reg_usb2_vbus>; diff --git a/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts b/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts index 4e1c590eb0..9ba62774e8 100644 --- a/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts +++ b/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts @@ -111,13 +111,9 @@ &gmac { pinctrl-names = "default"; pinctrl-0 = <&gmac_rgmii_pins>; - phy = <&phy1>; + phy-handle = <&phy1>; phy-mode = "rgmii"; status = "okay"; - - phy1: ethernet-phy@1 { - reg = <1>; - }; };

&hdmi { @@ -154,6 +150,12 @@ vref-supply = <&reg_vcc3v0>; };

+&gmac_mdio { + phy1: ethernet-phy@1 { + reg = <1>; + }; +}; + &mmc0 { vmmc-supply = <&reg_vcc3v3>; bus-width = <4>; @@ -174,23 +176,17 @@ };

&pio { + vcc-pa-supply = <&reg_vcc3v3>; + vcc-pc-supply = <&reg_vcc3v3>; + vcc-pe-supply = <&reg_ldo3>; + vcc-pf-supply = <&reg_vcc3v3>; + vcc-pg-supply = <&reg_ldo4>; + led_pins_olinuxinolime: led-pins { pins = "PH2"; function = "gpio_out"; drive-strength = <20>; }; - - usb0_id_detect_pin: usb0-id-detect-pin { - pins = "PH4"; - function = "gpio_in"; - bias-pull-up; - }; - - usb0_vbus_detect_pin: usb0-vbus-detect-pin { - pins = "PH5"; - function = "gpio_in"; - bias-pull-down; - }; };

&reg_ahci_5v { @@ -200,6 +196,14 @@

#include "axp209.dtsi"

+&ac_power_supply { + status = "okay"; +}; + +&battery_power_supply { + status = "okay"; +}; + &reg_dcdc2 { regulator-always-on; regulator-min-microvolt = <1000000>; @@ -267,10 +271,8 @@ };

&usbphy { - pinctrl-names = "default"; - pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; - usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ - usb0_vbus_det-gpio = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ + usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ + usb0_vbus_det-gpios = <&pio 7 5 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* PH5 */ usb0_vbus-supply = <&reg_usb0_vbus>; usb1_vbus-supply = <&reg_usb1_vbus>; usb2_vbus-supply = <&reg_usb2_vbus>; diff --git a/arch/arm/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/dts/sun7i-a20-olinuxino-micro.dts index 840ae1194a..359bd0d5b3 100644 --- a/arch/arm/dts/sun7i-a20-olinuxino-micro.dts +++ b/arch/arm/dts/sun7i-a20-olinuxino-micro.dts @@ -118,13 +118,9 @@ &gmac { pinctrl-names = "default"; pinctrl-0 = <&gmac_mii_pins>, <&gmac_txerr>; - phy = <&phy1>; + phy-handle = <&phy1>; phy-mode = "mii"; status = "okay"; - - phy1: ethernet-phy@1 { - reg = <1>; - }; };

&hdmi { @@ -215,6 +211,12 @@ }; };

+&gmac_mdio { + phy1: ethernet-phy@1 { + reg = <1>; + }; +}; + &mmc0 { vmmc-supply = <&reg_vcc3v3>; bus-width = <4>; @@ -252,18 +254,6 @@ function = "gpio_out"; drive-strength = <20>; }; - - usb0_id_detect_pin: usb0-id-detect-pin { - pins = "PH4"; - function = "gpio_in"; - bias-pull-up; - }; - - usb0_vbus_detect_pin: usb0-vbus-detect-pin { - pins = "PH5"; - function = "gpio_in"; - bias-pull-down; - }; };

#include "axp209.dtsi" @@ -355,10 +345,8 @@ };

&usbphy { - pinctrl-names = "default"; - pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; - usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ - usb0_vbus_det-gpio = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ + usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ + usb0_vbus_det-gpios = <&pio 7 5 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* PH5 */ usb0_vbus-supply = <&reg_usb0_vbus>; usb1_vbus-supply = <&reg_usb1_vbus>; usb2_vbus-supply = <&reg_usb2_vbus>; diff --git a/arch/arm/dts/sun7i-a20-orangepi-mini.dts b/arch/arm/dts/sun7i-a20-orangepi-mini.dts index 15881081ca..2e328d2cef 100644 --- a/arch/arm/dts/sun7i-a20-orangepi-mini.dts +++ b/arch/arm/dts/sun7i-a20-orangepi-mini.dts @@ -120,14 +120,10 @@ &gmac { pinctrl-names = "default"; pinctrl-0 = <&gmac_rgmii_pins>; - phy = <&phy1>; + phy-handle = <&phy1>; phy-mode = "rgmii"; phy-supply = <&reg_gmac_3v3>; status = "okay"; - - phy1: ethernet-phy@1 { - reg = <1>; - }; };

&hdmi { @@ -158,6 +154,12 @@ status = "okay"; };

+&gmac_mdio { + phy1: ethernet-phy@1 { + reg = <1>; + }; +}; + &mmc0 { vmmc-supply = <&reg_vcc3v3>; bus-width = <4>; @@ -176,14 +178,6 @@ status = "okay"; };

-&pio { - usb0_id_detect_pin: usb0-id-detect-pin { - pins = "PH4"; - function = "gpio_in"; - bias-pull-up; - }; -}; - &reg_dcdc2 { regulator-always-on; regulator-min-microvolt = <1000000>; @@ -239,9 +233,7 @@ };

&usbphy { - pinctrl-names = "default"; - pinctrl-0 = <&usb0_id_detect_pin>; - usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ + usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ usb0_vbus_power-supply = <&usb_power_supply>; usb0_vbus-supply = <&reg_usb0_vbus>; usb1_vbus-supply = <&reg_usb1_vbus>; diff --git a/arch/arm/dts/sun7i-a20-orangepi.dts b/arch/arm/dts/sun7i-a20-orangepi.dts index d64de2e73a..d75b2e2bab 100644 --- a/arch/arm/dts/sun7i-a20-orangepi.dts +++ b/arch/arm/dts/sun7i-a20-orangepi.dts @@ -96,14 +96,10 @@ &gmac { pinctrl-names = "default"; pinctrl-0 = <&gmac_rgmii_pins>; - phy = <&phy1>; + phy-handle = <&phy1>; phy-mode = "rgmii"; phy-supply = <&reg_gmac_3v3>; status = "okay"; - - phy1: ethernet-phy@1 { - reg = <1>; - }; };

&i2c0 { @@ -124,6 +120,12 @@ status = "okay"; };

+&gmac_mdio { + phy1: ethernet-phy@1 { + reg = <1>; + }; +}; + &mmc0 { vmmc-supply = <&reg_vcc3v3>; bus-width = <4>; @@ -135,14 +137,6 @@ status = "okay"; };

-&pio { - usb0_id_detect_pin: usb0-id-detect-pin { - pins = "PH4"; - function = "gpio_in"; - bias-pull-up; - }; -}; - &reg_dcdc2 { regulator-always-on; regulator-min-microvolt = <1000000>; @@ -198,9 +192,7 @@ };

&usbphy { - pinctrl-names = "default"; - pinctrl-0 = <&usb0_id_detect_pin>; - usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ + usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ usb0_vbus_power-supply = <&usb_power_supply>; usb0_vbus-supply = <&reg_usb0_vbus>; usb1_vbus-supply = <&reg_usb1_vbus>; diff --git a/arch/arm/dts/sun7i-a20-pcduino3-nano.dts b/arch/arm/dts/sun7i-a20-pcduino3-nano.dts index 538ea15fa3..bf38c66c18 100644 --- a/arch/arm/dts/sun7i-a20-pcduino3-nano.dts +++ b/arch/arm/dts/sun7i-a20-pcduino3-nano.dts @@ -1,5 +1,5 @@ /* - * Copyright 2015 Adam Sampson ats@offog.org + * Copyright 2015-2020 Adam Sampson ats@offog.org * * This file is dual-licensed: you can use it either under the terms * of the GPL or the X11 license, at your option. Note that this dual @@ -114,13 +114,9 @@ &gmac { pinctrl-names = "default"; pinctrl-0 = <&gmac_rgmii_pins>; - phy = <&phy1>; - phy-mode = "rgmii"; + phy-handle = <&phy1>; + phy-mode = "rgmii-id"; status = "okay"; - - phy1: ethernet-phy@1 { - reg = <1>; - }; };

&hdmi { @@ -149,6 +145,12 @@ status = "okay"; };

+&gmac_mdio { + phy1: ethernet-phy@1 { + reg = <1>; + }; +}; + &mmc0 { vmmc-supply = <&reg_vcc3v3>; bus-width = <4>; @@ -168,14 +170,6 @@ status = "okay"; };

-&pio { - usb0_id_detect_pin: usb0-id-detect-pin { - pins = "PH4"; - function = "gpio_in"; - bias-pull-up; - }; -}; - &reg_ahci_5v { gpio = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */ status = "okay"; @@ -226,9 +220,7 @@ };

&usbphy { - pinctrl-names = "default"; - pinctrl-0 = <&usb0_id_detect_pin>; - usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ + usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ usb1_vbus-supply = <&reg_usb1_vbus>; usb2_vbus-supply = <&reg_usb1_vbus>; status = "okay"; diff --git a/arch/arm/dts/sun7i-a20-pcduino3.dts b/arch/arm/dts/sun7i-a20-pcduino3.dts index a72ed4318d..cc8271d777 100644 --- a/arch/arm/dts/sun7i-a20-pcduino3.dts +++ b/arch/arm/dts/sun7i-a20-pcduino3.dts @@ -122,13 +122,9 @@ &gmac { pinctrl-names = "default"; pinctrl-0 = <&gmac_mii_pins>; - phy = <&phy1>; + phy-handle = <&phy1>; phy-mode = "mii"; status = "okay"; - - phy1: ethernet-phy@1 { - reg = <1>; - }; };

&i2c0 { @@ -149,6 +145,12 @@ status = "okay"; };

+&gmac_mdio { + phy1: ethernet-phy@1 { + reg = <1>; + }; +}; + &mmc0 { vmmc-supply = <&reg_vcc3v3>; bus-width = <4>; @@ -168,14 +170,6 @@ status = "okay"; };

-&pio { - usb0_id_detect_pin: usb0-id-detect-pin { - pins = "PH4"; - function = "gpio_in"; - bias-pull-up; - }; -}; - &reg_ahci_5v { gpio = <&pio 7 2 GPIO_ACTIVE_HIGH>; status = "okay"; @@ -226,9 +220,7 @@ };

&usbphy { - pinctrl-names = "default"; - pinctrl-0 = <&usb0_id_detect_pin>; - usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ + usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ usb1_vbus-supply = <&reg_usb1_vbus>; usb2_vbus-supply = <&reg_usb2_vbus>; status = "okay"; diff --git a/arch/arm/dts/sun7i-a20-wexler-tab7200.dts b/arch/arm/dts/sun7i-a20-wexler-tab7200.dts index ffade253d1..6a66b0432d 100644 --- a/arch/arm/dts/sun7i-a20-wexler-tab7200.dts +++ b/arch/arm/dts/sun7i-a20-wexler-tab7200.dts @@ -156,14 +156,6 @@ status = "okay"; };

-&pio { - usb0_id_detect_pin: usb0-id-detect-pin { - pins = "PH4"; - function = "gpio_in"; - bias-pull-up; - }; -}; - &pwm { pinctrl-names = "default"; pinctrl-0 = <&pwm0_pin>; @@ -223,9 +215,7 @@ };

&usbphy { - pinctrl-names = "default"; - pinctrl-0 = <&usb0_id_detect_pin>; - usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ + usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ usb0_vbus_power-supply = <&usb_power_supply>; usb0_vbus-supply = <&reg_usb0_vbus>; usb1_vbus-supply = <&reg_usb1_vbus>; diff --git a/arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts b/arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts index c27e56091f..3bfae98f3c 100644 --- a/arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts +++ b/arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts @@ -81,13 +81,9 @@ &gmac { pinctrl-names = "default"; pinctrl-0 = <&gmac_rgmii_pins>; - phy = <&phy1>; + phy-handle = <&phy1>; phy-mode = "rgmii"; status = "okay"; - - phy1: ethernet-phy@1 { - reg = <1>; - }; };

&i2c0 { @@ -110,6 +106,12 @@

#include "axp209.dtsi"

+&gmac_mdio { + phy1: ethernet-phy@1 { + reg = <1>; + }; +}; + &mmc0 { vmmc-supply = <&reg_vcc3v3>; bus-width = <4>; @@ -145,14 +147,6 @@ status = "okay"; };

-&pio { - usb0_id_detect_pin: usb0-id-detect-pin { - pins = "PH4"; - function = "gpio_in"; - bias-pull-up; - }; -}; - &reg_dcdc2 { regulator-always-on; regulator-min-microvolt = <1000000>; @@ -206,9 +200,7 @@ };

&usbphy { - pinctrl-names = "default"; - pinctrl-0 = <&usb0_id_detect_pin>; - usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ + usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ usb0_vbus_power-supply = <&usb_power_supply>; usb0_vbus-supply = <&reg_usb0_vbus>; usb1_vbus-supply = <&reg_usb1_vbus>; diff --git a/arch/arm/dts/sun7i-a20.dtsi b/arch/arm/dts/sun7i-a20.dtsi index 641a8fa6d4..6d6a37940d 100644 --- a/arch/arm/dts/sun7i-a20.dtsi +++ b/arch/arm/dts/sun7i-a20.dtsi @@ -47,6 +47,7 @@ #include <dt-bindings/dma/sun4i-a10.h> #include <dt-bindings/clock/sun7i-a20-ccu.h> #include <dt-bindings/reset/sun4i-a10-ccu.h> +#include <dt-bindings/pinctrl/sun4i-a10.h>

/ { interrupt-parent = <&gic>; @@ -180,7 +181,7 @@ default-pool { compatible = "shared-dma-pool"; size = <0x6000000>; - alloc-ranges = <0x4a000000 0x6000000>; + alloc-ranges = <0x40000000 0x10000000>; reusable; linux,cma-default; }; @@ -333,7 +334,7 @@ #dma-cells = <2>; };

- nfc: nand@1c03000 { + nfc: nand-controller@1c03000 { compatible = "allwinner,sun4i-a10-nand"; reg = <0x01c03000 0x1000>; interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; @@ -376,6 +377,16 @@ num-cs = <1>; };

+ csi0: csi@1c09000 { + compatible = "allwinner,sun7i-a20-csi0"; + reg = <0x01c09000 0x1000>; + interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_AHB_CSI0>, <&ccu CLK_CSI_SCLK>, <&ccu CLK_DRAM_CSI0>; + clock-names = "bus", "isp", "ram"; + resets = <&ccu RST_CSI0>; + status = "disabled"; + }; + emac: ethernet@1c0b000 { compatible = "allwinner,sun4i-a10-emac"; reg = <0x01c0b000 0x1000>; @@ -394,11 +405,12 @@ };

tcon0: lcd-controller@1c0c000 { - compatible = "allwinner,sun7i-a20-tcon"; + compatible = "allwinner,sun7i-a20-tcon0", + "allwinner,sun7i-a20-tcon"; reg = <0x01c0c000 0x1000>; interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; - resets = <&ccu RST_TCON0>; - reset-names = "lcd"; + resets = <&ccu RST_TCON0>, <&ccu RST_LVDS>; + reset-names = "lcd", "lvds"; clocks = <&ccu CLK_AHB_LCD0>, <&ccu CLK_TCON0_CH0>, <&ccu CLK_TCON0_CH1>; @@ -406,6 +418,7 @@ "tcon-ch0", "tcon-ch1"; clock-output-names = "tcon0-pixel-clock"; + #clock-cells = <0>; dmas = <&dma SUN4I_DMA_DEDICATED 14>;

ports { @@ -443,7 +456,8 @@ };

tcon1: lcd-controller@1c0d000 { - compatible = "allwinner,sun7i-a20-tcon"; + compatible = "allwinner,sun7i-a20-tcon1", + "allwinner,sun7i-a20-tcon"; reg = <0x01c0d000 0x1000>; interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; resets = <&ccu RST_TCON1>; @@ -455,6 +469,7 @@ "tcon-ch0", "tcon-ch1"; clock-output-names = "tcon1-pixel-clock"; + #clock-cells = <0>; dmas = <&dma SUN4I_DMA_DEDICATED 15>;

ports { @@ -586,13 +601,14 @@ phy-names = "usb"; extcon = <&usbphy 0>; allwinner,sram = <&otg_sram 1>; + dr_mode = "otg"; status = "disabled"; };

usbphy: phy@1c13400 { #phy-cells = <1>; compatible = "allwinner,sun7i-a20-usb-phy"; - reg = <0x01c13400 0x10 0x01c14800 0x4 0x01c1c800 0x4>; + reg = <0x01c13400 0x10>, <0x01c14800 0x4>, <0x01c1c800 0x4>; reg-names = "phy_ctrl", "pmu1", "pmu2"; clocks = <&ccu CLK_USB_PHY>; clock-names = "usb_phy"; @@ -716,6 +732,17 @@ status = "disabled"; };

+ csi1: csi@1c1d000 { + compatible = "allwinner,sun7i-a20-csi1", + "allwinner,sun4i-a10-csi1"; + reg = <0x01c1d000 0x1000>; + interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_AHB_CSI1>, <&ccu CLK_DRAM_CSI1>; + clock-names = "bus", "ram"; + resets = <&ccu RST_CSI1>; + status = "disabled"; + }; + spi3: spi@1c1f000 { compatible = "allwinner,sun4i-a10-spi"; reg = <0x01c1f000 0x1000>; @@ -751,21 +778,70 @@ #interrupt-cells = <3>; #gpio-cells = <3>;

+ /omit-if-no-ref/ + can_pa_pins: can-pa-pins { + pins = "PA16", "PA17"; + function = "can"; + }; + + /omit-if-no-ref/ can_ph_pins: can-ph-pins { pins = "PH20", "PH21"; function = "can"; };

+ /omit-if-no-ref/ clk_out_a_pin: clk-out-a-pin { pins = "PI12"; function = "clk_out_a"; };

+ /omit-if-no-ref/ clk_out_b_pin: clk-out-b-pin { pins = "PI13"; function = "clk_out_b"; };

+ /omit-if-no-ref/ + csi0_8bits_pins: csi-8bits-pins { + pins = "PE0", "PE2", "PE3", "PE4", "PE5", + "PE6", "PE7", "PE8", "PE9", "PE10", + "PE11"; + function = "csi0"; + }; + + /omit-if-no-ref/ + csi0_clk_pin: csi-clk-pin { + pins = "PE1"; + function = "csi0"; + }; + + /omit-if-no-ref/ + csi1_8bits_pg_pins: csi1-8bits-pg-pins { + pins = "PG0", "PG2", "PG3", "PG4", "PG5", + "PG6", "PG7", "PG8", "PG9", "PG10", + "PG11"; + function = "csi1"; + }; + + /omit-if-no-ref/ + csi1_24bits_ph_pins: csi1-24bits-ph-pins { + pins = "PH0", "PH1", "PH2", "PH3", "PH4", + "PH5", "PH6", "PH7", "PH8", "PH9", + "PH10", "PH11", "PH12", "PH13", "PH14", + "PH15", "PH16", "PH17", "PH18", "PH19", + "PH20", "PH21", "PH22", "PH23", "PH24", + "PH25", "PH26", "PH27"; + function = "csi1"; + }; + + /omit-if-no-ref/ + csi1_clk_pg_pin: csi1-clk-pg-pin { + pins = "PG1"; + function = "csi1"; + }; + + /omit-if-no-ref/ emac_pa_pins: emac-pa-pins { pins = "PA0", "PA1", "PA2", "PA3", "PA4", "PA5", "PA6", @@ -775,6 +851,17 @@ function = "emac"; };

+ /omit-if-no-ref/ + emac_ph_pins: emac-ph-pins { + pins = "PH8", "PH9", "PH10", "PH11", + "PH14", "PH15", "PH16", "PH17", + "PH18", "PH19", "PH20", "PH21", + "PH22", "PH23", "PH24", "PH25", + "PH26"; + function = "emac"; + }; + + /omit-if-no-ref/ gmac_mii_pins: gmac-mii-pins { pins = "PA0", "PA1", "PA2", "PA3", "PA4", "PA5", "PA6", @@ -784,6 +871,7 @@ function = "gmac"; };

+ /omit-if-no-ref/ gmac_rgmii_pins: gmac-rgmii-pins { pins = "PA0", "PA1", "PA2", "PA3", "PA4", "PA5", "PA6", @@ -798,46 +886,69 @@ drive-strength = <40>; };

+ /omit-if-no-ref/ i2c0_pins: i2c0-pins { pins = "PB0", "PB1"; function = "i2c0"; };

+ /omit-if-no-ref/ i2c1_pins: i2c1-pins { pins = "PB18", "PB19"; function = "i2c1"; };

+ /omit-if-no-ref/ i2c2_pins: i2c2-pins { pins = "PB20", "PB21"; function = "i2c2"; };

+ /omit-if-no-ref/ i2c3_pins: i2c3-pins { pins = "PI0", "PI1"; function = "i2c3"; };

+ /omit-if-no-ref/ ir0_rx_pin: ir0-rx-pin { pins = "PB4"; function = "ir0"; };

+ /omit-if-no-ref/ ir0_tx_pin: ir0-tx-pin { pins = "PB3"; function = "ir0"; };

+ /omit-if-no-ref/ ir1_rx_pin: ir1-rx-pin { pins = "PB23"; function = "ir1"; };

+ /omit-if-no-ref/ ir1_tx_pin: ir1-tx-pin { pins = "PB22"; function = "ir1"; };

+ /omit-if-no-ref/ + lcd_lvds0_pins: lcd-lvds0-pins { + pins = "PD0", "PD1", "PD2", "PD3", "PD4", + "PD5", "PD6", "PD7", "PD8", "PD9"; + function = "lvds0"; + }; + + /omit-if-no-ref/ + lcd_lvds1_pins: lcd-lvds1-pins { + pins = "PD10", "PD11", "PD12", "PD13", "PD14", + "PD15", "PD16", "PD17", "PD18", "PD19"; + function = "lvds1"; + }; + + /omit-if-no-ref/ mmc0_pins: mmc0-pins { pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5"; @@ -846,6 +957,7 @@ bias-pull-up; };

+ /omit-if-no-ref/ mmc2_pins: mmc2-pins { pins = "PC6", "PC7", "PC8", "PC9", "PC10", "PC11"; @@ -854,6 +966,7 @@ bias-pull-up; };

+ /omit-if-no-ref/ mmc3_pins: mmc3-pins { pins = "PI4", "PI5", "PI6", "PI7", "PI8", "PI9"; @@ -862,127 +975,206 @@ bias-pull-up; };

+ /omit-if-no-ref/ ps2_0_pins: ps2-0-pins { pins = "PI20", "PI21"; function = "ps2"; };

+ /omit-if-no-ref/ ps2_1_ph_pins: ps2-1-ph-pins { pins = "PH12", "PH13"; function = "ps2"; };

+ /omit-if-no-ref/ pwm0_pin: pwm0-pin { pins = "PB2"; function = "pwm"; };

+ /omit-if-no-ref/ pwm1_pin: pwm1-pin { pins = "PI3"; function = "pwm"; };

+ /omit-if-no-ref/ spdif_tx_pin: spdif-tx-pin { pins = "PB13"; function = "spdif"; bias-pull-up; };

+ /omit-if-no-ref/ spi0_pi_pins: spi0-pi-pins { pins = "PI11", "PI12", "PI13"; function = "spi0"; };

+ /omit-if-no-ref/ spi0_cs0_pi_pin: spi0-cs0-pi-pin { pins = "PI10"; function = "spi0"; };

+ /omit-if-no-ref/ spi0_cs1_pi_pin: spi0-cs1-pi-pin { pins = "PI14"; function = "spi0"; };

+ /omit-if-no-ref/ spi1_pi_pins: spi1-pi-pins { pins = "PI17", "PI18", "PI19"; function = "spi1"; };

+ /omit-if-no-ref/ spi1_cs0_pi_pin: spi1-cs0-pi-pin { pins = "PI16"; function = "spi1"; };

+ /omit-if-no-ref/ spi2_pb_pins: spi2-pb-pins { pins = "PB15", "PB16", "PB17"; function = "spi2"; };

+ /omit-if-no-ref/ spi2_cs0_pb_pin: spi2-cs0-pb-pin { pins = "PB14"; function = "spi2"; };

+ /omit-if-no-ref/ spi2_pc_pins: spi2-pc-pins { pins = "PC20", "PC21", "PC22"; function = "spi2"; };

+ /omit-if-no-ref/ spi2_cs0_pc_pin: spi2-cs0-pc-pin { pins = "PC19"; function = "spi2"; };

+ /omit-if-no-ref/ uart0_pb_pins: uart0-pb-pins { pins = "PB22", "PB23"; function = "uart0"; };

+ /omit-if-no-ref/ + uart0_pf_pins: uart0-pf-pins { + pins = "PF2", "PF4"; + function = "uart0"; + }; + + /omit-if-no-ref/ + uart1_pa_pins: uart1-pa-pins { + pins = "PA10", "PA11"; + function = "uart1"; + }; + + /omit-if-no-ref/ + uart1_cts_rts_pa_pins: uart1-cts-rts-pa-pins { + pins = "PA12", "PA13"; + function = "uart1"; + }; + + /omit-if-no-ref/ + uart2_pa_pins: uart2-pa-pins { + pins = "PA2", "PA3"; + function = "uart2"; + }; + + /omit-if-no-ref/ + uart2_cts_rts_pa_pins: uart2-cts-rts-pa-pins { + pins = "PA0", "PA1"; + function = "uart2"; + }; + + /omit-if-no-ref/ uart2_pi_pins: uart2-pi-pins { pins = "PI18", "PI19"; function = "uart2"; };

+ /omit-if-no-ref/ uart2_cts_rts_pi_pins: uart2-cts-rts-pi-pins { pins = "PI16", "PI17"; function = "uart2"; };

+ /omit-if-no-ref/ uart3_pg_pins: uart3-pg-pins { pins = "PG6", "PG7"; function = "uart3"; };

+ /omit-if-no-ref/ uart3_cts_rts_pg_pins: uart3-cts-rts-pg-pins { pins = "PG8", "PG9"; function = "uart3"; };

+ /omit-if-no-ref/ uart3_ph_pins: uart3-ph-pins { pins = "PH0", "PH1"; function = "uart3"; };

+ /omit-if-no-ref/ + uart3_cts_rts_ph_pins: uart3-cts-rts-ph-pins { + pins = "PH2", "PH3"; + function = "uart3"; + }; + + /omit-if-no-ref/ uart4_pg_pins: uart4-pg-pins { pins = "PG10", "PG11"; function = "uart4"; };

+ /omit-if-no-ref/ uart4_ph_pins: uart4-ph-pins { pins = "PH4", "PH5"; function = "uart4"; };

+ /omit-if-no-ref/ + uart5_ph_pins: uart5-ph-pins { + pins = "PH6", "PH7"; + function = "uart5"; + }; + + /omit-if-no-ref/ uart5_pi_pins: uart5-pi-pins { pins = "PI10", "PI11"; function = "uart5"; };

+ /omit-if-no-ref/ + uart6_pa_pins: uart6-pa-pins { + pins = "PA12", "PA13"; + function = "uart6"; + }; + + /omit-if-no-ref/ uart6_pi_pins: uart6-pi-pins { pins = "PI12", "PI13"; function = "uart6"; };

+ /omit-if-no-ref/ + uart7_pa_pins: uart7-pa-pins { + pins = "PA14", "PA15"; + function = "uart7"; + }; + + /omit-if-no-ref/ uart7_pi_pins: uart7-pi-pins { pins = "PI20", "PI21"; function = "uart7"; @@ -1004,6 +1196,8 @@ wdt: watchdog@1c20c90 { compatible = "allwinner,sun4i-a10-wdt"; reg = <0x01c20c90 0x10>; + interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&osc24M>; };

rtc: rtc@1c20d00 { @@ -1326,8 +1520,12 @@ snps,fixed-burst; snps,force_sf_dma_mode; status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; + + gmac_mdio: mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + }; };

hstimer@1c60000 { @@ -1341,7 +1539,7 @@ };

gic: interrupt-controller@1c81000 { - compatible = "arm,gic-400", "arm,cortex-a7-gic", "arm,cortex-a15-gic"; + compatible = "arm,gic-400"; reg = <0x01c81000 0x1000>, <0x01c82000 0x2000>, <0x01c84000 0x2000>, diff --git a/arch/arm/dts/sun8i-a83t-bananapi-m3.dts b/arch/arm/dts/sun8i-a83t-bananapi-m3.dts index eaff6fa401..431f70234d 100644 --- a/arch/arm/dts/sun8i-a83t-bananapi-m3.dts +++ b/arch/arm/dts/sun8i-a83t-bananapi-m3.dts @@ -107,6 +107,14 @@ }; };

+&cpu0 { + cpu-supply = <&reg_dcdc2>; +}; + +&cpu100 { + cpu-supply = <&reg_dcdc3>; +}; + &de { status = "okay"; }; @@ -123,7 +131,7 @@ pinctrl-0 = <&emac_rgmii_pins>; phy-supply = <&reg_sw>; phy-handle = <&rgmii_phy>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; allwinner,rx-delay-ps = <700>; allwinner,tx-delay-ps = <700>; status = "okay"; @@ -183,6 +191,11 @@ status = "okay"; };

+&r_cir { + clock-frequency = <3000000>; + status = "okay"; +}; + &r_rsb { status = "okay";

@@ -224,6 +237,14 @@

#include "axp81x.dtsi"

+&ac_power_supply { + status = "okay"; +}; + +&battery_power_supply { + status = "okay"; +}; + &reg_aldo1 { regulator-always-on; regulator-min-microvolt = <1800000>; @@ -301,8 +322,8 @@

&reg_dldo3 { regulator-always-on; - regulator-min-microvolt = <2500000>; - regulator-max-microvolt = <2500000>; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; regulator-name = "vcc-pd"; };

@@ -350,11 +371,37 @@ status = "okay"; };

+&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; + uart-has-rtscts; + status = "okay"; + + bluetooth { + compatible = "brcm,bcm43438-bt"; + clocks = <&ac100_rtc 1>; + clock-names = "lpo"; + vbat-supply = <&reg_dldo1>; + vddio-supply = <&reg_dldo1>; + device-wakeup-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */ + host-wakeup-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */ + shutdown-gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */ + }; +}; + &usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + +&usb_power_supply { status = "okay"; };

&usbphy { + usb0_id_det-gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* PH11 */ + usb0_vbus_power-supply = <&usb_power_supply>; + usb0_vbus-supply = <&reg_drivevbus>; usb1_vbus-supply = <&reg_usb1_vbus>; status = "okay"; }; diff --git a/arch/arm/dts/sun8i-a83t-cubietruck-plus.dts b/arch/arm/dts/sun8i-a83t-cubietruck-plus.dts index 5dba4fc310..d8326a5c68 100644 --- a/arch/arm/dts/sun8i-a83t-cubietruck-plus.dts +++ b/arch/arm/dts/sun8i-a83t-cubietruck-plus.dts @@ -60,6 +60,17 @@ stdout-path = "serial0:115200n8"; };

+ hdmi-connector { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_con_in: endpoint { + remote-endpoint = <&hdmi_out_con>; + }; + }; + }; + leds { compatible = "gpio-leds";

@@ -90,7 +101,7 @@ initial-mode = <1>; /* initialize in HUB mode */ disabled-ports = <1>; intn-gpios = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ - reset-gpios = <&pio 4 16 GPIO_ACTIVE_HIGH>; /* PE16 */ + reset-gpios = <&pio 4 16 GPIO_ACTIVE_LOW>; /* PE16 */ connect-gpios = <&pio 4 17 GPIO_ACTIVE_HIGH>; /* PE17 */ refclk-frequency = <19200000>; }; @@ -145,6 +156,18 @@ }; };

+&cpu0 { + cpu-supply = <&reg_dcdc2>; +}; + +&cpu100 { + cpu-supply = <&reg_dcdc3>; +}; + +&de { + status = "okay"; +}; + &ehci0 { /* GL830 USB-to-SATA bridge here */ status = "okay"; @@ -160,10 +183,20 @@ pinctrl-0 = <&emac_rgmii_pins>; phy-supply = <&reg_dldo4>; phy-handle = <&rgmii_phy>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; + status = "okay"; +}; + +&hdmi { status = "okay"; };

+&hdmi_out { + hdmi_out_con: endpoint { + remote-endpoint = <&hdmi_con_in>; + }; +}; + &mdio { rgmii_phy: ethernet-phy@1 { compatible = "ethernet-phy-ieee802.3-c22"; @@ -239,6 +272,14 @@

#include "axp81x.dtsi"

+&ac_power_supply { + status = "okay"; +}; + +&battery_power_supply { + status = "okay"; +}; + &reg_aldo1 { regulator-always-on; regulator-min-microvolt = <1800000>; @@ -386,11 +427,37 @@ status = "okay"; };

+&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; + uart-has-rtscts; + status = "okay"; + + bluetooth { + compatible = "brcm,bcm4330-bt"; + clocks = <&ac100_rtc 1>; + clock-names = "lpo"; + vbat-supply = <&reg_dcdc1>; + vddio-supply = <&reg_sw>; + device-wakeup-gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */ + host-wakeup-gpios = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */ + shutdown-gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */ + }; +}; + &usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + +&usb_power_supply { status = "okay"; };

&usbphy { + usb0_id_det-gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* PH11 */ + usb0_vbus_power-supply = <&usb_power_supply>; + usb0_vbus-supply = <&reg_drivevbus>; usb1_vbus-supply = <&reg_usb1_vbus>; usb2_vbus-supply = <&reg_usb2_vbus>; status = "okay"; diff --git a/arch/arm/dts/sun8i-a83t.dtsi b/arch/arm/dts/sun8i-a83t.dtsi index 2be23d6009..c010b27fdb 100644 --- a/arch/arm/dts/sun8i-a83t.dtsi +++ b/arch/arm/dts/sun8i-a83t.dtsi @@ -50,6 +50,7 @@ #include <dt-bindings/reset/sun8i-a83t-ccu.h> #include <dt-bindings/reset/sun8i-de2.h> #include <dt-bindings/reset/sun8i-r-ccu.h> +#include <dt-bindings/thermal/thermal.h>

/ { interrupt-parent = <&gic>; @@ -61,79 +62,91 @@ #size-cells = <0>;

cpu0: cpu@0 { - clocks = <&ccu CLK_C0CPUX>; - clock-names = "cpu"; compatible = "arm,cortex-a7"; device_type = "cpu"; + clocks = <&ccu CLK_C0CPUX>; operating-points-v2 = <&cpu0_opp_table>; cci-control-port = <&cci_control0>; enable-method = "allwinner,sun8i-a83t-smp"; reg = <0>; + #cooling-cells = <2>; };

- cpu@1 { + cpu1: cpu@1 { compatible = "arm,cortex-a7"; device_type = "cpu"; + clocks = <&ccu CLK_C0CPUX>; operating-points-v2 = <&cpu0_opp_table>; cci-control-port = <&cci_control0>; enable-method = "allwinner,sun8i-a83t-smp"; reg = <1>; + #cooling-cells = <2>; };

- cpu@2 { + cpu2: cpu@2 { compatible = "arm,cortex-a7"; device_type = "cpu"; + clocks = <&ccu CLK_C0CPUX>; operating-points-v2 = <&cpu0_opp_table>; cci-control-port = <&cci_control0>; enable-method = "allwinner,sun8i-a83t-smp"; reg = <2>; + #cooling-cells = <2>; };

- cpu@3 { + cpu3: cpu@3 { compatible = "arm,cortex-a7"; device_type = "cpu"; + clocks = <&ccu CLK_C0CPUX>; operating-points-v2 = <&cpu0_opp_table>; cci-control-port = <&cci_control0>; enable-method = "allwinner,sun8i-a83t-smp"; reg = <3>; + #cooling-cells = <2>; };

cpu100: cpu@100 { - clocks = <&ccu CLK_C1CPUX>; - clock-names = "cpu"; compatible = "arm,cortex-a7"; device_type = "cpu"; + clocks = <&ccu CLK_C1CPUX>; operating-points-v2 = <&cpu1_opp_table>; cci-control-port = <&cci_control1>; enable-method = "allwinner,sun8i-a83t-smp"; reg = <0x100>; + #cooling-cells = <2>; };

- cpu@101 { + cpu101: cpu@101 { compatible = "arm,cortex-a7"; device_type = "cpu"; + clocks = <&ccu CLK_C1CPUX>; operating-points-v2 = <&cpu1_opp_table>; cci-control-port = <&cci_control1>; enable-method = "allwinner,sun8i-a83t-smp"; reg = <0x101>; + #cooling-cells = <2>; };

- cpu@102 { + cpu102: cpu@102 { compatible = "arm,cortex-a7"; device_type = "cpu"; + clocks = <&ccu CLK_C1CPUX>; operating-points-v2 = <&cpu1_opp_table>; cci-control-port = <&cci_control1>; enable-method = "allwinner,sun8i-a83t-smp"; reg = <0x102>; + #cooling-cells = <2>; };

- cpu@103 { + cpu103: cpu@103 { compatible = "arm,cortex-a7"; device_type = "cpu"; + clocks = <&ccu CLK_C1CPUX>; operating-points-v2 = <&cpu1_opp_table>; cci-control-port = <&cci_control1>; enable-method = "allwinner,sun8i-a83t-smp"; reg = <0x103>; + #cooling-cells = <2>; }; };

@@ -187,11 +200,6 @@ status = "disabled"; };

- memory { - reg = <0x40000000 0x80000000>; - device_type = "memory"; - }; - cpu0_opp_table: opp_table0 { compatible = "operating-points-v2"; opp-shared; @@ -306,16 +314,27 @@

display_clocks: clock@1000000 { compatible = "allwinner,sun8i-a83t-de2-clk"; - reg = <0x01000000 0x100000>; - clocks = <&ccu CLK_PLL_DE>, - <&ccu CLK_BUS_DE>; - clock-names = "mod", - "bus"; + reg = <0x01000000 0x10000>; + clocks = <&ccu CLK_BUS_DE>, + <&ccu CLK_PLL_DE>; + clock-names = "bus", + "mod"; resets = <&ccu RST_BUS_DE>; #clock-cells = <1>; #reset-cells = <1>; };

+ rotate: rotate@1020000 { + compatible = "allwinner,sun8i-a83t-de2-rotate"; + reg = <0x1020000 0x10000>; + interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&display_clocks CLK_BUS_ROT>, + <&display_clocks CLK_ROT>; + clock-names = "bus", + "mod"; + resets = <&display_clocks RST_ROT>; + }; + mixer0: mixer@1100000 { compatible = "allwinner,sun8i-a83t-de2-mixer-0"; reg = <0x01100000 0x100000>; @@ -338,6 +357,11 @@ reg = <0>; remote-endpoint = <&tcon0_in_mixer0>; }; + + mixer0_out_tcon1: endpoint@1 { + reg = <1>; + remote-endpoint = <&tcon1_in_mixer0>; + }; }; }; }; @@ -356,9 +380,17 @@ #size-cells = <0>;

mixer1_out: port@1 { + #address-cells = <1>; + #size-cells = <0>; reg = <1>;

- mixer1_out_tcon1: endpoint { + mixer1_out_tcon0: endpoint@0 { + reg = <0>; + remote-endpoint = <&tcon0_in_mixer1>; + }; + + mixer1_out_tcon1: endpoint@1 { + reg = <1>; remote-endpoint = <&tcon1_in_mixer1>; }; }; @@ -425,6 +457,7 @@ clocks = <&ccu CLK_BUS_TCON0>, <&ccu CLK_TCON0>; clock-names = "ahb", "tcon-ch0"; clock-output-names = "tcon-pixel-clock"; + #clock-cells = <0>; resets = <&ccu RST_BUS_TCON0>, <&ccu RST_BUS_LVDS>; reset-names = "lcd", "lvds";

@@ -441,11 +474,14 @@ reg = <0>; remote-endpoint = <&mixer0_out_tcon0>; }; + + tcon0_in_mixer1: endpoint@1 { + reg = <1>; + remote-endpoint = <&mixer1_out_tcon0>; + }; };

tcon0_out: port@1 { - #address-cells = <1>; - #size-cells = <0>; reg = <1>; }; }; @@ -465,9 +501,17 @@ #size-cells = <0>;

tcon1_in: port@0 { + #address-cells = <1>; + #size-cells = <0>; reg = <0>;

- tcon1_in_mixer1: endpoint { + tcon1_in_mixer0: endpoint@0 { + reg = <0>; + remote-endpoint = <&mixer0_out_tcon1>; + }; + + tcon1_in_mixer1: endpoint@1 { + reg = <1>; remote-endpoint = <&mixer1_out_tcon1>; }; }; @@ -549,6 +593,31 @@ sid: eeprom@1c14000 { compatible = "allwinner,sun8i-a83t-sid"; reg = <0x1c14000 0x400>; + #address-cells = <1>; + #size-cells = <1>; + + ths_calibration: thermal-sensor-calibration@34 { + reg = <0x34 8>; + }; + }; + + crypto: crypto@1c15000 { + compatible = "allwinner,sun8i-a83t-crypto"; + reg = <0x01c15000 0x1000>; + interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; + resets = <&ccu RST_BUS_SS>; + clocks = <&ccu CLK_BUS_SS>, <&ccu CLK_SS>; + clock-names = "bus", "mod"; + }; + + msgbox: mailbox@1c17000 { + compatible = "allwinner,sun8i-a83t-msgbox", + "allwinner,sun6i-a31-msgbox"; + reg = <0x01c17000 0x1000>; + clocks = <&ccu CLK_BUS_MSGBOX>; + resets = <&ccu RST_BUS_MSGBOX>; + interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; + #mbox-cells = <1>; };

usb_otg: usb@1c19000 { @@ -562,6 +631,7 @@ phys = <&usbphy 0>; phy-names = "usb"; extcon = <&usbphy 0>; + dr_mode = "otg"; status = "disabled"; };

@@ -649,6 +719,20 @@ #interrupt-cells = <3>; #gpio-cells = <3>;

+ /omit-if-no-ref/ + csi_8bit_parallel_pins: csi-8bit-parallel-pins { + pins = "PE0", "PE2", "PE3", "PE6", "PE7", + "PE8", "PE9", "PE10", "PE11", + "PE12", "PE13"; + function = "csi"; + }; + + /omit-if-no-ref/ + csi_mclk_pin: csi-mclk-pin { + pins = "PE1"; + function = "csi"; + }; + emac_rgmii_pins: emac-rgmii-pins { pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD11", "PD12", "PD13", "PD14", "PD18", @@ -676,6 +760,12 @@ function = "i2c1"; };

+ /omit-if-no-ref/ + i2c2_pe_pins: i2c2-pe-pins { + pins = "PE14", "PE15"; + function = "i2c2"; + }; + i2c2_ph_pins: i2c2-ph-pins { pins = "PH4", "PH5"; function = "i2c2"; @@ -747,10 +837,16 @@ pins = "PG8", "PG9"; function = "uart1"; }; + + /omit-if-no-ref/ + uart2_pb_pins: uart2-pb-pins { + pins = "PB0", "PB1"; + function = "uart2"; + }; };

timer@1c20c00 { - compatible = "allwinner,sun4i-a10-timer"; + compatible = "allwinner,sun8i-a23-timer"; reg = <0x01c20c00 0xa0>; interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; @@ -852,6 +948,39 @@ status = "disabled"; };

+ uart2: serial@1c28800 { + compatible = "snps,dw-apb-uart"; + reg = <0x01c28800 0x400>; + interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; + reg-shift = <2>; + reg-io-width = <4>; + clocks = <&ccu CLK_BUS_UART2>; + resets = <&ccu RST_BUS_UART2>; + status = "disabled"; + }; + + uart3: serial@1c28c00 { + compatible = "snps,dw-apb-uart"; + reg = <0x01c28c00 0x400>; + interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; + reg-shift = <2>; + reg-io-width = <4>; + clocks = <&ccu CLK_BUS_UART3>; + resets = <&ccu RST_BUS_UART3>; + status = "disabled"; + }; + + uart4: serial@1c29000 { + compatible = "snps,dw-apb-uart"; + reg = <0x01c29000 0x400>; + interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; + reg-shift = <2>; + reg-io-width = <4>; + clocks = <&ccu CLK_BUS_UART4>; + resets = <&ccu RST_BUS_UART4>; + status = "disabled"; + }; + i2c0: i2c@1c2ac00 { compatible = "allwinner,sun8i-a83t-i2c", "allwinner,sun6i-a31-i2c"; @@ -898,12 +1027,10 @@ reg = <0x01c30000 0x104>; interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "macirq"; - resets = <&ccu 13>; - reset-names = "stmmaceth"; - clocks = <&ccu 27>; + clocks = <&ccu CLK_BUS_EMAC>; clock-names = "stmmaceth"; - #address-cells = <1>; - #size-cells = <0>; + resets = <&ccu RST_BUS_EMAC>; + reset-names = "stmmaceth"; status = "disabled";

mdio: mdio { @@ -914,7 +1041,7 @@ };

gic: interrupt-controller@1c81000 { - compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic"; + compatible = "arm,gic-400"; reg = <0x01c81000 0x1000>, <0x01c82000 0x2000>, <0x01c84000 0x2000>, @@ -924,6 +1051,21 @@ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>; };

+ csi: camera@1cb0000 { + compatible = "allwinner,sun8i-a83t-csi"; + reg = <0x01cb0000 0x1000>; + interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_CSI>, + <&ccu CLK_CSI_SCLK>, + <&ccu CLK_DRAM_CSI>; + clock-names = "bus", "mod", "ram"; + resets = <&ccu RST_BUS_CSI>; + status = "disabled"; + + csi_in: port { + }; + }; + hdmi: hdmi@1ee0000 { compatible = "allwinner,sun8i-a83t-dw-hdmi"; reg = <0x01ee0000 0x10000>; @@ -935,7 +1077,7 @@ resets = <&ccu RST_BUS_HDMI1>; reset-names = "ctrl"; phys = <&hdmi_phy>; - phy-names = "hdmi-phy"; + phy-names = "phy"; pinctrl-names = "default"; pinctrl-0 = <&hdmi_pins>; status = "disabled"; @@ -981,7 +1123,7 @@ compatible = "allwinner,sun8i-a83t-r-ccu"; reg = <0x01f01400 0x400>; clocks = <&osc24M>, <&osc16Md512>, <&osc16M>, - <&ccu 6>; + <&ccu CLK_PLL_PERIPH>; clock-names = "hosc", "losc", "iosc", "pll-periph"; #clock-cells = <1>; #reset-cells = <1>; @@ -992,6 +1134,26 @@ reg = <0x1f01c00 0x400>; };

+ r_cir: ir@1f02000 { + compatible = "allwinner,sun8i-a83t-ir", + "allwinner,sun6i-a31-ir"; + clocks = <&r_ccu CLK_APB0_IR>, <&r_ccu CLK_IR>; + clock-names = "apb", "ir"; + resets = <&r_ccu RST_APB0_IR>; + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; + reg = <0x01f02000 0x400>; + pinctrl-names = "default"; + pinctrl-0 = <&r_cir_pin>; + status = "disabled"; + }; + + r_lradc: lradc@1f03c00 { + compatible = "allwinner,sun8i-a83t-r-lradc"; + reg = <0x01f03c00 0x100>; + interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + r_pio: pinctrl@1f02c00 { compatible = "allwinner,sun8i-a83t-r-pinctrl"; reg = <0x01f02c00 0x400>; @@ -1004,6 +1166,11 @@ interrupt-controller; #interrupt-cells = <3>;

+ r_cir_pin: r-cir-pin { + pins = "PL12"; + function = "s_cir_rx"; + }; + r_rsb_pins: r-rsb-pins { pins = "PL0", "PL1"; function = "s_rsb"; @@ -1026,5 +1193,82 @@ #address-cells = <1>; #size-cells = <0>; }; + + ths: thermal-sensor@1f04000 { + compatible = "allwinner,sun8i-a83t-ths"; + reg = <0x01f04000 0x100>; + interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; + nvmem-cells = <&ths_calibration>; + nvmem-cell-names = "calibration"; + #thermal-sensor-cells = <1>; + }; + }; + + thermal-zones { + cpu0_thermal: cpu0-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&ths 0>; + + trips { + cpu0_hot: cpu-hot { + temperature = <80000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu0_very_hot: cpu-very-hot { + temperature = <100000>; + hysteresis = <0>; + type = "critical"; + }; + }; + + cooling-maps { + cpu-hot-limit { + trip = <&cpu0_hot>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + + cpu1_thermal: cpu1-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&ths 1>; + + trips { + cpu1_hot: cpu-hot { + temperature = <80000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu1_very_hot: cpu-very-hot { + temperature = <100000>; + hysteresis = <0>; + type = "critical"; + }; + }; + + cooling-maps { + cpu-hot-limit { + trip = <&cpu1_hot>; + cooling-device = <&cpu100 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu101 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu102 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu103 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + + gpu_thermal: gpu-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&ths 2>; + }; }; }; diff --git a/arch/arm/dts/sun8i-h3-orangepi-pc-plus.dts b/arch/arm/dts/sun8i-h3-orangepi-pc-plus.dts index 71fb732089..babf4cf1b2 100644 --- a/arch/arm/dts/sun8i-h3-orangepi-pc-plus.dts +++ b/arch/arm/dts/sun8i-h3-orangepi-pc-plus.dts @@ -53,11 +53,6 @@ }; };

-&emac { - /* LEDs changed to active high on the plus */ - /delete-property/ allwinner,leds-active-low; -}; - &mmc1 { vmmc-supply = <&reg_vcc3v3>; bus-width = <4>; diff --git a/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts b/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts index 6dbf7b2e0c..b6ca45d18e 100644 --- a/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts +++ b/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts @@ -67,7 +67,7 @@ pinctrl-0 = <&emac_rgmii_pins>; phy-supply = <&reg_gmac_3v3>; phy-handle = <&ext_rgmii_phy>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; status = "okay"; };

diff --git a/arch/arm/dts/sun8i-h3-orangepi-zero-plus2.dts b/arch/arm/dts/sun8i-h3-orangepi-zero-plus2.dts index b8f46e2802..251bbab7d7 100644 --- a/arch/arm/dts/sun8i-h3-orangepi-zero-plus2.dts +++ b/arch/arm/dts/sun8i-h3-orangepi-zero-plus2.dts @@ -70,6 +70,21 @@ }; };

+ leds { + compatible = "gpio-leds"; + + pwr { + label = "orangepi:green:pwr"; + gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; + + status { + label = "orangepi:red:status"; + gpios = <&pio 0 17 GPIO_ACTIVE_HIGH>; + }; + }; + reg_vcc3v3: vcc3v3 { compatible = "regulator-fixed"; regulator-name = "vcc3v3"; @@ -88,6 +103,10 @@ status = "okay"; };

+&ehci0 { + status = "okay"; +}; + &hdmi { status = "okay"; }; @@ -132,8 +151,27 @@ status = "okay"; };

+&ohci0 { + status = "okay"; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pa_pins>; status = "okay"; }; + +&usb_otg { + /* + * According to schematics CN1 MicroUSB port can be used to take + * external 5V to power up the board VBUS. On the contrary CN1 MicroUSB + * port cannot provide power externally even if the board is powered + * via GPIO pins. It thus makes sense to force peripheral mode. + */ + dr_mode = "peripheral"; + status = "okay"; +}; + +&usbphy { + status = "okay"; +}; diff --git a/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts b/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts index 15c22b06fc..47954551f5 100644 --- a/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts +++ b/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts @@ -120,7 +120,7 @@ pinctrl-names = "default"; pinctrl-0 = <&gmac_rgmii_pins>; phy-handle = <&phy1>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; phy-supply = <&reg_dc1sw>; status = "okay"; }; @@ -198,16 +198,16 @@ };

&reg_dc1sw { - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; regulator-name = "vcc-gmac-phy"; };

&reg_dcdc1 { regulator-always-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "vcc-3v0"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-3v3"; };

&reg_dcdc2 { diff --git a/arch/arm/dts/sunxi-bananapi-m2-plus.dtsi b/arch/arm/dts/sunxi-bananapi-m2-plus.dtsi index 39263e74fb..8e5cb3b3fd 100644 --- a/arch/arm/dts/sunxi-bananapi-m2-plus.dtsi +++ b/arch/arm/dts/sunxi-bananapi-m2-plus.dtsi @@ -126,7 +126,7 @@ pinctrl-0 = <&emac_rgmii_pins>; phy-supply = <&reg_gmac_3v3>; phy-handle = <&ext_rgmii_phy>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id";

status = "okay"; };