Hi Wolfgang,
On Wednesday 12 December 2007 11:44, w.wegner@astro-kom.de wrote:
Hi Matthias,
On 11 Dec 2007 at 18:00, Matthias Fuchs wrote:
The new fwr callback makes sense to me. I agree that using the callbacks for every signal change might be very slow. I used the the slave parallel code to load an fpga in slave serial mode some time before. This reduces the callbacks a lot and booting was about 4 times faster. I used the byte write callback to shift out 8 bits in this case.
I hope that my FPGA patches will get it into U-Boot when the next merge windows opens. Perhaps you can provide a patch on top of that afterwards.
I will try to, as meanwhile my U-Boot environment settled down a bit, this should not be too much work.
Would such a "selective patch" like the last one be OK, then I do not have to investigate why I get all the empty diff lines from the new tree...?
I do not have to apply your patch. But I expect that wd will only except clean 'splipping' patches.
So it would be better to fix up your tree so that you can generate a patch as it is expected. If nothing helps, check out a clean U-boot tree, modify it and try it again. It should be easier to fix your toolchain (we the help of others) than to get unclean patches accepted.
Matthias