From: Hou Zhiqiang Zhiqiang.Hou@nxp.com
Add device tree for P1020RDB boards and enable CONFIG_OF_CONTROL so that device tree can be compiled. Update board README for device tree usage.
Signed-off-by: Hou Zhiqiang Zhiqiang.Hou@nxp.com --- arch/powerpc/dts/Makefile | 1 + arch/powerpc/dts/p2020-post.dtsi | 27 +++++++++++++++++ arch/powerpc/dts/p2020.dtsi | 31 ++++++++++++++++++++ arch/powerpc/dts/p2020rdb-pc.dts | 23 +++++++++++++++ arch/powerpc/dts/p2020rdb-pc_36b.dts | 23 +++++++++++++++ board/freescale/p1_p2_rdb_pc/README | 2 +- configs/P2020RDB-PC_36BIT_NAND_defconfig | 2 ++ configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 2 ++ configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 2 ++ configs/P2020RDB-PC_36BIT_defconfig | 3 ++ configs/P2020RDB-PC_NAND_defconfig | 2 ++ configs/P2020RDB-PC_SDCARD_defconfig | 2 ++ configs/P2020RDB-PC_SPIFLASH_defconfig | 2 ++ configs/P2020RDB-PC_defconfig | 3 ++ 14 files changed, 124 insertions(+), 1 deletion(-) create mode 100644 arch/powerpc/dts/p2020-post.dtsi create mode 100644 arch/powerpc/dts/p2020.dtsi create mode 100644 arch/powerpc/dts/p2020rdb-pc.dts create mode 100644 arch/powerpc/dts/p2020rdb-pc_36b.dts
diff --git a/arch/powerpc/dts/Makefile b/arch/powerpc/dts/Makefile index 3a806bdddf..bee1e2d793 100644 --- a/arch/powerpc/dts/Makefile +++ b/arch/powerpc/dts/Makefile @@ -2,6 +2,7 @@
dtb-$(CONFIG_TARGET_P1020RDB_PC) += p1020rdb-pc.dtb p1020rdb-pc_36b.dtb dtb-$(CONFIG_TARGET_P1020RDB_PD) += p1020rdb-pd.dtb +dtb-$(CONFIG_TARGET_P2020RDB) += p2020rdb-pc.dtb p2020rdb-pc_36b.dtb dtb-$(CONFIG_TARGET_T1024RDB) += t1024rdb.dtb dtb-$(CONFIG_TARGET_T1042D4RDB) += t1042d4rdb.dtb dtb-$(CONFIG_TARGET_T2080QDS) += t2080qds.dtb diff --git a/arch/powerpc/dts/p2020-post.dtsi b/arch/powerpc/dts/p2020-post.dtsi new file mode 100644 index 0000000000..f20d1fa20d --- /dev/null +++ b/arch/powerpc/dts/p2020-post.dtsi @@ -0,0 +1,27 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * P2020 Silicon/SoC Device Tree Source (post include) + * + * Copyright 2013 Freescale Semiconductor Inc. + * Copyright 2019 NXP + */ + +&soc { + #address-cells = <1>; + #size-cells = <1>; + device_type = "soc"; + compatible = "fsl,p2020-immr", "simple-bus"; + bus-frequency = <0x0>; + + mpic: pic@40000 { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <4>; + reg = <0x40000 0x40000>; + compatible = "fsl,mpic"; + device_type = "open-pic"; + big-endian; + single-cpu-affinity; + last-interrupt-source = <255>; + }; +}; diff --git a/arch/powerpc/dts/p2020.dtsi b/arch/powerpc/dts/p2020.dtsi new file mode 100644 index 0000000000..7c4c2061d4 --- /dev/null +++ b/arch/powerpc/dts/p2020.dtsi @@ -0,0 +1,31 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * P2020 Silicon/SoC Device Tree Source (pre include) + * + * Copyright 2013 Freescale Semiconductor Inc. + * Copyright 2019 NXP + */ + +/dts-v1/; + +/include/ "e500v2_power_isa.dtsi" + +/ { + #address-cells = <2>; + #size-cells = <2>; + interrupt-parent = <&mpic>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: PowerPC,P2020@0 { + device_type = "cpu"; + reg = <0>; + }; + cpu1: PowerPC,P2020@1 { + device_type = "cpu"; + reg = <1>; + }; + }; +}; diff --git a/arch/powerpc/dts/p2020rdb-pc.dts b/arch/powerpc/dts/p2020rdb-pc.dts new file mode 100644 index 0000000000..4800b76c1c --- /dev/null +++ b/arch/powerpc/dts/p2020rdb-pc.dts @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * P2020RDB-PC Device Tree Source + * + * Copyright 2013 - 2015 Freescale Semiconductor Inc. + * Copyright 2019 NXP + */ + +/include/ "p2020.dtsi" + +/ { + model = "fsl,P2020RDB-PC"; + compatible = "fsl,P2020RDB-PC"; + #address-cells = <2>; + #size-cells = <2>; + interrupt-parent = <&mpic>; + + soc: soc@ffe00000 { + ranges = <0x0 0x0 0xffe00000 0x100000>; + }; +}; + +/include/ "p2020-post.dtsi" diff --git a/arch/powerpc/dts/p2020rdb-pc_36b.dts b/arch/powerpc/dts/p2020rdb-pc_36b.dts new file mode 100644 index 0000000000..8323b90e6d --- /dev/null +++ b/arch/powerpc/dts/p2020rdb-pc_36b.dts @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * P2020RDB-PC (36-bit address map) Device Tree Source + * + * Copyright 2013 - 2015 Freescale Semiconductor Inc. + * Copyright 2019 NXP + */ + +/include/ "p2020.dtsi" + +/ { + model = "fsl,P2020RDB-PC"; + compatible = "fsl,P2020RDB-PC"; + #address-cells = <2>; + #size-cells = <2>; + interrupt-parent = <&mpic>; + + soc: soc@fffe00000 { + ranges = <0x0 0xf 0xffe00000 0x100000>; + }; +}; + +/include/ "p2020-post.dtsi" diff --git a/board/freescale/p1_p2_rdb_pc/README b/board/freescale/p1_p2_rdb_pc/README index 26902ded8d..b85cf0209e 100644 --- a/board/freescale/p1_p2_rdb_pc/README +++ b/board/freescale/p1_p2_rdb_pc/README @@ -48,7 +48,7 @@ enable QE-TDM for linux kernel, set "qe;tdm" in hwconfig. Syntax is as below
Device tree support and how to enable it for different configs -------------------------------------------------------------- -Device tree support is available for p1020rdb for below mentioned boot, +Device tree support is available for p1020rdb and p2020rdb for below mentioned boot, 1. NOR Boot 2. NAND Boot 3. SD Boot diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig index 4865a0e62d..d8c04e2fe1 100644 --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig @@ -7,6 +7,8 @@ CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y +CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc_36b" +CONFIG_OF_CONTROL=y CONFIG_PHYS_64BIT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig index 59764df362..7c45996a3f 100644 --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig @@ -8,6 +8,8 @@ CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y +CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc_36b" +CONFIG_OF_CONTROL=y CONFIG_PHYS_64BIT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig index 664eec0617..5372d98474 100644 --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig @@ -9,6 +9,8 @@ CONFIG_SPL_SPI_SUPPORT=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y +CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc_36b" +CONFIG_OF_CONTROL=y CONFIG_PHYS_64BIT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig index a9c21fbadb..79f4f3c9ac 100644 --- a/configs/P2020RDB-PC_36BIT_defconfig +++ b/configs/P2020RDB-PC_36BIT_defconfig @@ -1,8 +1,11 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 CONFIG_MPC85xx=y +CONFIG_MPC85XX_HAVE_RESET_VECTOR=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y +CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc_36b" +CONFIG_OF_CONTROL=y CONFIG_PHYS_64BIT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig index a5cfd10d0e..2f91691b9f 100644 --- a/configs/P2020RDB-PC_NAND_defconfig +++ b/configs/P2020RDB-PC_NAND_defconfig @@ -7,6 +7,8 @@ CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y +CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc" +CONFIG_OF_CONTROL=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig index f8f727ebf7..a5cee06b7b 100644 --- a/configs/P2020RDB-PC_SDCARD_defconfig +++ b/configs/P2020RDB-PC_SDCARD_defconfig @@ -8,6 +8,8 @@ CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y +CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc" +CONFIG_OF_CONTROL=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig index 6f18acf16d..a2f9d87637 100644 --- a/configs/P2020RDB-PC_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig @@ -9,6 +9,8 @@ CONFIG_SPL_SPI_SUPPORT=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y +CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc" +CONFIG_OF_CONTROL=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig index 706a27dd1b..40004597d1 100644 --- a/configs/P2020RDB-PC_defconfig +++ b/configs/P2020RDB-PC_defconfig @@ -1,8 +1,11 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 CONFIG_MPC85xx=y +CONFIG_MPC85XX_HAVE_RESET_VECTOR=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y +CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc" +CONFIG_OF_CONTROL=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y