
On 03/03/2016 11:00 PM, George Broz wrote:
On 3 March 2016 at 06:51, Marek Vasut marex@denx.de wrote:
On 03/03/2016 03:48 PM, Dinh Nguyen wrote:
On 03/02/2016 05:24 PM, Marek Vasut wrote:
Well, that's our usual USB/QSPI cache issue that's tormenting your soul. CCing Chin ;-)
Does the issue by any chance magically disappear if you apply this patch:
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index 026e7ef..06802c6 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h @@ -274,7 +274,7 @@ static inline void set_dacr(unsigned int val)
/* options available for data cache on each page */ enum dcache_option {
DCACHE_OFF = TTB_SECT_DOMAIN(0) | TTB_SECT_XN_MASK | TTB_SECT,
DCACHE_OFF = TTB_SECT_S_MASK | TTB_SECT_DOMAIN(0) |
TTB_SECT_XN_MASK | TTB_SECT, DCACHE_WRITETHROUGH = DCACHE_OFF | TTB_SECT_C_MASK, DCACHE_WRITEBACK = DCACHE_WRITETHROUGH | TTB_SECT_B_MASK, DCACHE_WRITEALLOC = DCACHE_WRITEBACK | TTB_SECT_TEX(1),
The 2016.01 code I'm using already includes this patch. If I try reading a USB stick with dcache on or off I get the same result:
=> dcache off => usb reset resetting USB... USB0: Core Release: 2.93a dwc_otg_core_host_init: Timeout! dwc_otg_core_host_init: Timeout! dwc_otg_core_host_init: Timeout! dwc_otg_core_host_init: Timeout! dwc_otg_core_host_init: Timeout! dwc_otg_core_host_init: Timeout! dwc_otg_core_host_init: Timeout! dwc_otg_core_host_init: Timeout! dwc_otg_core_host_init: Timeout! dwc_otg_core_host_init: Timeout! dwc_otg_core_host_init: Timeout! dwc_otg_core_host_init: Timeout! dwc_otg_core_host_init: Timeout! dwc_otg_core_host_init: Timeout! dwc_otg_core_host_init: Timeout! scanning bus 0 for devices... 1 USB Device(s) found => usb tree USB device tree: 1 Hub (480 Mb/s, 0mA) U-Boot Root Hub
This more likely means that either clock or reset bits are not configured correctly OR you're using the wrong controller. Since you're mixing old U-Boot SPL with new U-Boot, there can be some discrepancy and I have no idea how to help you with that :(
Best regards, Marek Vasut