Hi Stefan,
Sorry if I jump into this thread this late!
No problem
I have a question about SDRAM detection code (cpu/ppc4xx/sdram.c). I tested it with the following configurations:
... Yes, you are right: There seems to be a problem with the refresh counter intialization in the sdram.c code (I am not referencing the spd_sdram.c code here!). But I am not sure that this explains why U-Boot is not running on your board with the 256mbit chips. We are running this code on our board with all kind of sdram's (64mbit, 128mbit, 256mbit and even 512mbit) without any known problems. The 256mbit chips we use right now are the Micron MT48LC16M16A2-7E.
But again there seems to be a problem which needs to be fixed. I can put this on my list or you could send a patch! ;-)
Actually we have just found a small hardware related problem that prevented SDRAM to work and we fixed it. Nevertheless the counter is wrong but it seems SDRAM technology is really reliable! If 512mbit chips work, it means that they tolerate a refresh frequency that is 1/4 of the nominal value!!! Unfortunatley processors are not so well behaved :-) If I have the chance, I'll try to submit a patch.
Regards,
llandre
DAVE Electronics System House - R&D Department web: http://www.dave-tech.it email: r&d2@dave-tech.it