Re: U-Boot atheros PHY support and cubox ethernet

On Wed, Jun 17, 2020 at 4:00 PM Tom Rini trini@konsulko.com wrote:

+#ifdef CONFIG_FEC_MXC +static int setup_fec(void) +{

•   struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
  

•   struct gpio_desc desc;
  

•   int ret = enable_fec_anatop_clock(0, ENET_25MHZ);
  

•   if (ret)
  

•           return ret;
  

•   /* set gpr1[ENET_CLK_SEL] */
  

•   setbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_ENET_CLK_SEL_MASK);
  

•   /* Reset PHY */
  

•   ret = dm_gpio_lookup_name("GPIO4_15", &desc);
  

•   if (ret) {
  

•           printf("%s: phy reset lookup failed\n", __func__);
  

•           return ret;
  

•   }
  

•   ret = dm_gpio_request(&desc, "phy-reset");
  

•   if (ret) {
  

•           printf("%s: phy reset request failed\n", __func__);
  

•           return ret;
  

•   }
  

•   gpio_direction_output(ETH_PHY_RESET, 0);
  

•   mdelay(10);
  

•   gpio_set_value(ETH_PHY_RESET, 1);
  

•   udelay(100);
  

The Ethernet PHY reset can be done via device tree.

It seems we need to change it like this:

--- a/arch/arm/dts/imx6qdl-sr-som.dtsi +++ b/arch/arm/dts/imx6qdl-sr-som.dtsi @@ -54,7 +54,8 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_microsom_enet_ar8035>; phy-mode = "rgmii-id"; - phy-reset-duration = <2>; + phy-reset-duration = <10>; + phy-reset-post-delay = <1>; phy-reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; status = "okay"; };

Does it still probe if you remove the PHY reset from the board code?