On Thu, Apr 21, 2022 at 06:14:58AM -0500, Adam Ford wrote:
On Thu, Apr 21, 2022 at 5:29 AM Tommaso Merciai tommaso.merciai@amarulasolutions.com wrote:
On Thu, Apr 21, 2022 at 08:48:05AM +0200, Tommaso Merciai wrote:
- Fabio
- Tim
- Michael
- Marek
- Adam
Hi, I'm working on drivers/clk/imx/clk-imx8mm.c to port and bring up eLCDIF clocks. After port all necessary clocks needed by eLCDIF I found that IMX8MM_VIDEO_PLL1 clock is not enabled and need the clk_enable to enable it at the end of the clk-imx8mm probe:
struct clk *clkp;
clk_get_by_id(IMX8MM_VIDEO_PLL1, &clkp); clk_set_rate(clkp, 594000000UL); clk_enable(clkp);
What do you think about this solution? There is a more standard way to do this? I'm missing somethings?
I think the LCD driver should request the clock and clock rate based on settings the device tree. However, I think the bigger issues is that you might run into issues with the lack of a disp-blkctrl driver. Marek enable the GPC driver fairly recently, but the blkctrl driver will be needed to enable the LCD and DSI portions or the system may hang.
Hi Adam, Thanks for the tips, I will investigate on that.
Tommaso
adam
Thanks, Tommmaso -- Tommaso Merciai Embedded Linux Engineer tommaso.merciai@amarulasolutions.com __________________________________
Amarula Solutions SRL Via Le Canevare 30, 31100 Treviso, Veneto, IT T. +39 042 243 5310 info@amarulasolutions.com www.amarulasolutions.com
-- Tommaso Merciai Embedded Linux Engineer tommaso.merciai@amarulasolutions.com __________________________________
Amarula Solutions SRL Via Le Canevare 30, 31100 Treviso, Veneto, IT T. +39 042 243 5310 info@amarulasolutions.com www.amarulasolutions.com