
5 Aug
2020
5 Aug
'20
11:17 a.m.
On 8/5/20 11:15 AM, Tan, Ley Foon wrote: [...]
diff --git a/Makefile b/Makefile index 2629a74..13429a0 100644 --- a/Makefile +++ b/Makefile @@ -1578,8 +1578,9 @@ u-boot.spr: spl/u-boot-spl.img u-boot.img
FORCE
ifneq ($(CONFIG_ARCH_SOCFPGA),) quiet_cmd_socboot = SOCBOOT $@ cmd_socboot = cat spl/u-boot-spl.sfp spl/u-boot-spl.sfp \
spl/u-boot-spl.sfp spl/u-boot-spl.sfp \
u-boot.img > $@ || rm -f $@
spl/u-boot-spl.sfp \
spl/u-boot-spl.sfp > spl/u-boot-splx4.sfp ; \
cat spl/u-boot-splx4.sfp u-boot.img > $@ || rm -f $@
Isn't that what the existing code does already ?
Also, this will I think fail on 128k erase block size NAND due to missing padding.
This is to generate an output file (spl/u-boot-splx4.sfp) with 4 SPL images, each SPL image size is 256KB. So, spl/u-boot-splx4.sfp is always with 1MB size (4x256KB). Shouldn't have problem for 128KB erase size NAND.
Isn't the SPL padded to 64 kiB each ?