On Tue, Jun 11, 2013 at 12:23 PM, Jagannadha Sutradharudu Teki < jagannadha.sutradharudu-teki@xilinx.com> wrote:
This patch updated the spi_flash read func to support all sizes of flashes using bank reg addr facility.
The same support has been added in below patch for erase/write spi_flash functions: "sf: Support all sizes of flashes using bank addr reg facility" (sha1: c956f600cbb0943d0afe1004cdb503f4fcd8f415)
With these new updates on sf framework, the flashes which has < 16MB are not effected as per as performance is concern and but the u-boot.bin size incrased ~600 bytes.
sf update(for first 16MBytes), Changes before: U-Boot> sf update 0x1000000 0x0 0x1000000
- N25Q256 16777216 bytes written, 0 bytes skipped in 199.72s, speed 86480 B/s
- W25Q128BV 16777216 bytes written, 0 bytes skipped in 351.739s, speed 48913 B/s
- S25FL256S_64K 16777216 bytes written, 0 bytes skipped in 65.659s, speed 262144 B/s
sf update(for first 16MBytes), Changes before: U-Boot> sf update 0x1000000 0x0 0x1000000
- N25Q256 16777216 bytes written, 0 bytes skipped in 198.953s, speed 86480 B/s
- W25Q128BV 16777216 bytes written, 0 bytes skipped in 350.90s, speed 49200 B/s
- S25FL256S_64K 16777216 bytes written, 0 bytes skipped in 66.521s, speed 262144 B/s
Signed-off-by: Jagannadha Sutradharudu Teki jaganna@xilinx.com
Reviewed-by: Simon Glass sjg@chromium.org