Using changes in this patch we were able to reduce approx 8k size of u-boot-spl.bin image. Following is breif description of changes to reduce SPL size: 1. Changes in board/freescale/ls1088a/Makefile to remove compilation of eth.c and cpld.c in case of SPL build. 2. Changes in board/freescale/ls1088a/ls1088a.c to keep board_early_init_f funcations in case of SPL build. 3. Changes in ls1088a_common.h & ls1088ardb.h to remove driver specific macros due to which static data was being compiled in case of SPL build. 4. Enable CONFIG_SYS_DCACHE_OFF in case of SPL build as DCACHE is not being enabled in case of SPL image but was compiled in to add redundant code.
Signed-off-by: Sumit Garg sumit.garg@nxp.com ---
Dependent on ls1088 base SD boot target. Also dependent on ls1088 QPSI secure boot target.
board/freescale/ls1088a/Makefile | 4 +++- board/freescale/ls1088a/ls1088a.c | 14 ++++++++------ include/configs/ls1088a_common.h | 20 ++++++++++++++++++++ include/configs/ls1088ardb.h | 20 ++++++++++++++++++++ 4 files changed, 51 insertions(+), 7 deletions(-)
diff --git a/board/freescale/ls1088a/Makefile b/board/freescale/ls1088a/Makefile index bdcce9e..0e15031 100644 --- a/board/freescale/ls1088a/Makefile +++ b/board/freescale/ls1088a/Makefile @@ -5,6 +5,8 @@ #
obj-y += ls1088a.o +obj-y += ddr.o +ifndef CONFIG_SPL_BUILD obj-$(CONFIG_TARGET_LS1088ARDB) += eth_ls1088ardb.o obj-$(CONFIG_TARGET_LS1088AQDS) += eth_ls1088aqds.o -obj-y += ddr.o +endif diff --git a/board/freescale/ls1088a/ls1088a.c b/board/freescale/ls1088a/ls1088a.c index 1860f9c..1c28ab4 100644 --- a/board/freescale/ls1088a/ls1088a.c +++ b/board/freescale/ls1088a/ls1088a.c @@ -24,6 +24,13 @@
DECLARE_GLOBAL_DATA_PTR;
+int board_early_init_f(void) +{ + fsl_lsch3_early_init_f(); + return 0; +} + +#if !defined(CONFIG_SPL_BUILD) unsigned long long get_qixis_addr(void) { unsigned long long addr; @@ -324,12 +331,6 @@ int board_init(void) return 0; }
-int board_early_init_f(void) -{ - fsl_lsch3_early_init_f(); - return 0; -} - void detail_board_ddr_info(void) { puts("\nDDR "); @@ -404,3 +405,4 @@ int ft_board_setup(void *blob, bd_t *bd) return 0; } #endif +#endif /* defined(CONFIG_SPL_BUILD) */ diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index 63b69f8..fb4c852 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -7,6 +7,20 @@ #ifndef __LS1088_COMMON_H #define __LS1088_COMMON_H
+/* SPL build */ +#ifdef CONFIG_SPL_BUILD +#define SPL_NO_BOARDINFO +#define SPL_NO_QIXIS +#define SPL_NO_PCI +#define SPL_NO_ENV +#define SPL_NO_RTC +#define SPL_NO_USB +#define SPL_NO_SATA +#define SPL_NO_QSPI +#define SPL_NO_IFC +#define CONFIG_SYS_DCACHE_OFF +#undef CONFIG_DISPLAY_CPUINFO +#endif
#define CONFIG_REMAKE_ELF #define CONFIG_FSL_LAYERSCAPE @@ -70,8 +84,10 @@ #define CONFIG_BAUDRATE 115200 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+#ifndef SPL_NO_IFC /* IFC */ #define CONFIG_FSL_IFC +#endif
/* * During booting, IFC is mapped at the region of 0x30000000. @@ -154,6 +170,7 @@ unsigned long long get_qixis_addr(void);
/* #define CONFIG_DISPLAY_CPUINFO */
+#ifndef SPL_NO_ENV /* Allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE
@@ -192,6 +209,7 @@ unsigned long long get_qixis_addr(void); " cp.b $kernel_start $kernel_load" \ " $kernel_size && bootm $kernel_load" #endif +#endif
/* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ @@ -200,7 +218,9 @@ unsigned long long get_qixis_addr(void); #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */ #define CONFIG_SYS_LONGHELP +#ifndef SPL_NO_ENV #define CONFIG_CMDLINE_EDITING 1 +#endif #define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_MAXARGS 64 /* max command args */
diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h index 1d2dd4f..913252d 100644 --- a/include/configs/ls1088ardb.h +++ b/include/configs/ls1088ardb.h @@ -9,7 +9,9 @@
#include "ls1088a_common.h"
+#ifndef SPL_NO_BOARDINFO #define CONFIG_DISPLAY_BOARDINFO_LATE +#endif
#if defined(CONFIG_QSPI_BOOT) #define CONFIG_ENV_IS_IN_SPI_FLASH @@ -29,7 +31,9 @@ #endif
#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) +#ifndef CONFIG_SPL_BUILD #define CONFIG_QIXIS_I2C_ACCESS +#endif #define SYS_NO_FLASH #undef CONFIG_CMD_IMLS #endif @@ -97,7 +101,11 @@ #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } #endif #endif + +#ifndef SPL_NO_IFC #define CONFIG_NAND_FSL_IFC +#endif + #define CONFIG_SYS_NAND_MAX_ECCPOS 256 #define CONFIG_SYS_NAND_MAX_OOBFREE 2
@@ -139,7 +147,10 @@
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
+#ifndef SPL_NO_QIXIS #define CONFIG_FSL_QIXIS +#endif + #define CONFIG_SYS_I2C_FPGA_ADDR 0x66 #define QIXIS_LBMAP_SWITCH 2 #define QIXIS_QMAP_MASK 0xe0 @@ -223,6 +234,8 @@ #define I2C_RETIMER_ADDR 0x18 #define I2C_MUX_CH_DEFAULT 0x8 #define I2C_MUX_CH5 0xD + +#ifndef SPL_NO_RTC /* * RTC configuration */ @@ -230,6 +243,7 @@ #define CONFIG_RTC_PCF8563 1 #define CONFIG_SYS_I2C_RTC_ADDR 0x51 /* Channel 3*/ #define CONFIG_CMD_DATE +#endif
/* EEPROM */ #define CONFIG_ID_EEPROM @@ -240,6 +254,7 @@ #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
+#ifndef SPL_NO_QSPI /* QSPI device */ #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) #define CONFIG_FSL_QSPI @@ -247,6 +262,7 @@ #define FSL_QSPI_FLASH_SIZE (1 << 26) #define FSL_QSPI_FLASH_NUM 2 #endif +#endif
#define CONFIG_CMD_MEMINFO #define CONFIG_CMD_MEMTEST @@ -260,6 +276,7 @@ #endif #define CONFIG_FSL_MEMAC
+#ifndef SPL_NO_ENV /* Initial environment variables */ #ifdef CONFIG_SECURE_BOOT #undef CONFIG_EXTRA_ENV_SETTINGS @@ -342,6 +359,7 @@ #define CONFIG_ETHPRIME "DPMAC1@xgmii" #define CONFIG_PHY_GIGE #endif +#endif
/* MMC */ #ifdef CONFIG_MMC @@ -349,6 +367,7 @@ #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 #endif
+#ifndef SPL_NO_ENV #undef CONFIG_CMDLINE_EDITING #include <config_distro_defaults.h>
@@ -358,6 +377,7 @@ func(SCSI, scsi, 0) \ func(DHCP, dhcp, na) #include <config_distro_bootcmd.h> +#endif
#include <asm/fsl_secure_boot.h>