Allen,
-----Original Message----- From: sjg@google.com [mailto:sjg@google.com] On Behalf Of Simon Glass Sent: Friday, May 10, 2013 8:06 PM To: Allen Martin Cc: Tom Warren; Stephen Warren; U-Boot Mailing List Subject: Re: [PATCH] Tegra: clk: always use find_best_divider() for periph clocks
On Fri, May 10, 2013 at 8:56 PM, Allen Martin amartin@nvidia.com wrote:
When adjusting peripheral clocks always use find_best_divider() instead of clk_get_divider() even when a secondary divider is not available. In the case where is requested clock is too slow to be derived from the parent clock this allows a best effort to get close to the requested clock.
This comes up for commands like "sf" where the user can pass a clock speed on the command line or "sspi" where the clock is hardcoded to 1MHz, but the Tegra114 SPI controller can't go that low.
Did you test all other periphs and check their config'd clocks to make sure this doesn't affect anything else negatively? This proc is pretty universal (called by clock_start_periph_pll, which is used by MMC/I2C/USB/display drivers).
Tom
Signed-off-by: Allen Martin amartin@nvidia.com
Seems right to me,
Acked-by: Simon Glass sjg@chromium.org
-- nvpublic