Add GPIO (generic port) controller nodes for PH1-sLD3, PH1-LD4, PH1-Pro4 and PH1-sLD8.
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com ---
arch/arm/dts/uniphier-ph1-ld4.dtsi | 8 ++++++++ arch/arm/dts/uniphier-ph1-pro4.dtsi | 8 ++++++++ arch/arm/dts/uniphier-ph1-sld3.dtsi | 8 ++++++++ arch/arm/dts/uniphier-ph1-sld8.dtsi | 8 ++++++++ 4 files changed, 32 insertions(+)
diff --git a/arch/arm/dts/uniphier-ph1-ld4.dtsi b/arch/arm/dts/uniphier-ph1-ld4.dtsi index 39d7b24..686d56c 100644 --- a/arch/arm/dts/uniphier-ph1-ld4.dtsi +++ b/arch/arm/dts/uniphier-ph1-ld4.dtsi @@ -71,6 +71,14 @@ clock-frequency = <36864000>; };
+ gpio: gpio@55000000 { + compatible = "socionext,uniphier-gpio"; + reg = <0x55000000 0x200>; + gpio-controller; + #gpio-cells = <2>; + ngpio = <(8 * 17)>; + }; + i2c0: i2c@58400000 { compatible = "socionext,uniphier-i2c"; #address-cells = <1>; diff --git a/arch/arm/dts/uniphier-ph1-pro4.dtsi b/arch/arm/dts/uniphier-ph1-pro4.dtsi index f06906c..920aaad 100644 --- a/arch/arm/dts/uniphier-ph1-pro4.dtsi +++ b/arch/arm/dts/uniphier-ph1-pro4.dtsi @@ -78,6 +78,14 @@ clock-frequency = <73728000>; };
+ gpio: gpio@55000000 { + compatible = "socionext,uniphier-gpio"; + reg = <0x55000000 0x200>; + gpio-controller; + #gpio-cells = <2>; + ngpio = <(8 * 31)>; + }; + i2c0: i2c@58780000 { compatible = "socionext,uniphier-fi2c"; #address-cells = <1>; diff --git a/arch/arm/dts/uniphier-ph1-sld3.dtsi b/arch/arm/dts/uniphier-ph1-sld3.dtsi index 2fa42a6..3b7e33e 100644 --- a/arch/arm/dts/uniphier-ph1-sld3.dtsi +++ b/arch/arm/dts/uniphier-ph1-sld3.dtsi @@ -93,6 +93,14 @@ clock-frequency = <36864000>; };
+ gpio: gpio@55000000 { + compatible = "socionext,uniphier-gpio"; + reg = <0x55000000 0x200>; + gpio-controller; + #gpio-cells = <2>; + ngpio = <(8 * 17)>; + }; + i2c0: i2c@58400000 { compatible = "socionext,uniphier-i2c"; #address-cells = <1>; diff --git a/arch/arm/dts/uniphier-ph1-sld8.dtsi b/arch/arm/dts/uniphier-ph1-sld8.dtsi index 15df50f..10f7866 100644 --- a/arch/arm/dts/uniphier-ph1-sld8.dtsi +++ b/arch/arm/dts/uniphier-ph1-sld8.dtsi @@ -71,6 +71,14 @@ clock-frequency = <80000000>; };
+ gpio: gpio@55000000 { + compatible = "socionext,uniphier-gpio"; + reg = <0x55000000 0x200>; + gpio-controller; + #gpio-cells = <2>; + ngpio = <(8 * 17)>; + }; + i2c0: i2c@58400000 { compatible = "socionext,uniphier-i2c"; #address-cells = <1>;