Hi,
On Thursday, March 26, 2015, Simon Glass sjg@chromium.org wrote:
Hi Minkyu,
On 24 March 2015 at 01:45, Minkyu Kang <promsoft@gmail.com javascript:;> wrote:
hi,
On 20 March 2015 at 02:06, Guillaume Gardet <guillaume.gardet@free.fr
<javascript:_e(%7B%7D,'cvml','guillaume.gardet@free.fr javascript:;');>>
wrote:
Ping.
Guillaume
Le 11/03/2015 10:34, Guillaume GARDET a écrit :
Commit 2e82e9252695a612ab0cbf40fa0c7368515f6506 'Exynos: Clock: Cleanup
soc_get_periph_rate' introduced a bug in I2C config. This patch makes cros_ec keyboard working again on Samsung Chromebook (snow).
Changes in V2: reorder lines as requested by Joonyoung Shim.
Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr
<javascript:_e(%7B%7D,'cvml','guillaume.gardet@free.fr javascript:;
');>>
Cc: Akshay Saraswat <akshay.s@samsung.com javascript:; <javascript:_e(%7B%7D,'cvml','akshay.s@samsung.com javascript:;');>> Cc: Minkyu Kang <mk7.kang@samsung.com javascript:; <javascript:_e(%7B%7D,'cvml','mk7.kang@samsung.com javascript:;');>> Cc: Joonyoung Shim <jy0922.shim@samsung.com javascript:; <javascript:_e(%7B%7D,'cvml','jy0922.shim@samsung.com javascript:;
');>>
arch/arm/cpu/armv7/exynos/clock.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c index c6455c2..2984867 100644 --- a/arch/arm/cpu/armv7/exynos/clock.c +++ b/arch/arm/cpu/armv7/exynos/clock.c @@ -423,8 +423,8 @@ static unsigned long exynos5_get_periph_rate(int peripheral) case PERIPH_ID_I2C6: case PERIPH_ID_I2C7: src = EXYNOS_SRC_MPLL;
div = readl(&clk->div_top0);sub_div = readl(&clk->div_top1);
div = readl(&clk->div_top1);sub_div = readl(&clk->div_top0); break; default: debug("%s: invalid peripheral %d", __func__,peripheral);
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This patch will be merged at next week!
Great! Also where are we with the peach Pi display series? Can that go in also?
sure. I'll check it.
Regards, Simon