If the DDR3 module supports industrial temperature range and requires the x2 refresh rate for that temp range, the refresh period must be 3.9us instead of 7.8 us.
Signed-off-by: Valentin Longchamp valentin.longchamp@keymile.com --- arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c b/arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c index 3e7c269..603b68b 100644 --- a/arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c +++ b/arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c @@ -320,6 +320,8 @@ ddr_compute_dimm_parameters(const ddr3_spd_eeprom_t *spd, * = 3.9 us at ext temperature range */ pdimm->refresh_rate_ps = 7800000; + if ((spd->therm_ref_opt & 0x1) && !(spd->therm_ref_opt & 0x2)) + pdimm->refresh_rate_ps = 3900000;
/* * min four active window delay time