6 Feb
2015
6 Feb
'15
9:27 p.m.
On 4 February 2015 at 20:26, Simon Glass sjg@chromium.org wrote:
On 4 February 2015 at 01:26, Bin Meng bmeng.cn@gmail.com wrote:
The Quark SoC contains a legacy SPI controller in the legacy bridge which is ICH7 compatible. Like Tunnel Creek and BayTrail, the BIOS control register offset in the ICH SPI driver is wrong for the Quark SoC too, unprotect_spi_flash() is added to enable the flash write.
Signed-off-by: Bin Meng bmeng.cn@gmail.com
arch/x86/cpu/quark/quark.c | 17 +++++++++++++++++ arch/x86/dts/galileo.dts | 13 +++++++++++++ drivers/spi/ich.c | 3 ++- 3 files changed, 32 insertions(+), 1 deletion(-)
Acked-by: Simon Glass sjg@chromium.org
Applied to u-boot-x86, thanks!