On Monday 09 October 2006 16:15, Jeff Mann wrote:
That would work. Is simple, and would work for initialization. It would involve using a proper mask for nand_baseaddr[..] when setting the location of the nand read/write/control registers to ignore the CS data.
OK.
Nand_init(...) calls nand_init_chip(...) which then calls board_nand_init(...) I think the most appropriate place to select the proper Chip select is in the board_nand_init() function.
No. It should be a function called from the following functions: - board_nand_init() - do_nand() (in the "device" part)
Something like:
void nand_select_chip(struct nand_chip *nand) { int cs = nand->IO_ADDR_R & 0x3 ... }
This should do it. Or did I miss something?
This function is only passed an address of the chip nand_chip struct address. So I still think that an entry in the nand_chip struct should be used for tracking the chip select to keep the chip select code out of nand.c and keep the code as simple as possible.
Hmmm. Is something missing in my example above?
So, I like the #define CFG_NAND_BASE_LIST { CFG_NAND_BASE + 1, CFG_NAND_BASE + 2 }
configuration method, but I still think that the struct nand_chip needs a chip select variable.
Please explain why.
Do we assume the use of the nand flash controller on PPC 440 EP, Epx, GP, and GPx processors by default (unless still using the legacy drivers like the bamboo board)?
For now yes. It's very unlikely that a board with a PPC with an embedded NAND controller like 440EP/GR/EPx/GRx will implement a NAND interface in a different way. If such a board will appear we can still add some configuration method for this.
Best regards, Stefan