Em Qui, 2010-10-07 às 00:39 -0500, Swarthout Edward L-SWARTHOU escreveu:
From: Carlos Roberto Moratelli
I am trying to map a PCIe peripherical on my MPC8536 custom board. The peripherical is on PCIe1 port.
Is this still an issue?
pci_init_board: devdisr=40900, sdrs2_io_sel=7, io_sel=7 Serdes2 disalbed
That is fine.
PCIE3: disabled PCIE1: disabledThis is the problem. Check:
pcie_configured = is_serdes_configured(PCIE1); if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE))
in your board file.
Rigth! I just enabled CONFIG_PCIE1 flag and the PCIE1 bus is detected. Now I have this new log:
PCIE1 connected to Slot1 as Root Complex (base address ffe0a000) Outbound memory range: f8000000:100000000 PCICSRBAR @ 0xf7f00000 R0 bus_start: 0 phys_start: 0 size: 8000000 PCI reg:0 0000000c10000000:f800000008000000 0000000000000001 0210def0 PCI reg:1 0000000fffc10000:0000000000010000 0000000100000001 0210def0 PCI reg:2 0000000fffe00000:f7f0000000100000 0000010000000001 0210def0 PCI reg:3 0000000000000000:0000000008000000 0000010800000001 0210def0 ....PCIE link error. Skipping scan.LTSSM=0x08 PCIE1 on bus 01 - 01
I was expecting to find a peripherical on PCIE1 bus. I have a switch chip connected to Serdes 1 lane A.
pci_init_board: devdisr=40900, sdrs2_io_sel=7, io_sel=7 Serdes2 disalbed
How you can see, serdes 1 is enabled and working with pcie1 (io_sel=7). It appears that something is not correctly configured, but I have no idea about what.
PCIE2: disabled PCI: 32 bit, 66 MHz, sync, host, arbiter (base address ffe08000)...
Scanning PCI bus 00 PCIE1 on bus 00 - 00This is a code bug, it really should say is PCI1 and not PCIE1.
Yes! That was a bit confused.
Running pci command I can see:
=> pci Scanning PCI devices on bus 0 BusDevFun VendorId DeviceId Device Class Sub-Class _____________________________________________________________ 00.00.00 0x1957 0x0050 Processor 0x20
I don't know if I am correct, but I understand that the PCIe controller identify itself. However, the PCIe peripherical was not
found.
You need to figure out why "PCIE1: disabled" is occurring
-Ed Swarthout
I will apreciate some tip to deal with that issue.
Thanks,
Carlos Roberto Moratelli.