On Tue, Jan 04, 2022 at 06:03:17PM +0800, Potin Lai wrote:
Initial introduction of Bletchley equipped with Aspeed 2600 BMC SoC.
Signed-off-by: Potin Lai potin.lai@quantatw.com Reviewed-by: Patrick Williams patrick@stwcx.xyz
Change since v1:
- Disable mdio0, mdio1, mdio2
- Remove mac0, mac1, mac3 (keep disabled)
- Enable mac2, and set to fixed-link
arch/arm/dts/Makefile | 3 +- arch/arm/dts/ast2600-bletchley.dts | 285 +++++++++++++++++++++++++++++ 2 files changed, 287 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/ast2600-bletchley.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index df844065cd..a172a9f8c6 100755 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -685,7 +685,8 @@ dtb-$(CONFIG_ARCH_ASPEED) += \ ast2600-rainier.dtb \ ast2600-slt.dtb \ ast2600-tacoma.dtb \
- ast2600-intel.dtb
- ast2600-intel.dtb \
- ast2600-bletchley.dtb
dtb-$(CONFIG_ARCH_STI) += stih410-b2260.dtb
Does this depend on other changes that I missed? We don't have those lines in the Makefile today, thanks.