
On Monday 26 September 2016 05:15 PM, Masahiro Yamada wrote:
The KeyStone platform has its own clk_get_rate() but its prototype is different from that of the common-clk (clk-uclass) framework.
Prefix the KeyStone specific implementation with _ks in order to avoid name-space conflict.
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com
Acked-by: Lokesh Vutla lokeshvutla@ti.com
Thanks and regards, Lokesh
arch/arm/include/asm/ti-common/keystone_net.h | 4 ++-- arch/arm/mach-keystone/clock.c | 24 ++++++++++++------------ arch/arm/mach-keystone/cmd_clock.c | 2 +- arch/arm/mach-keystone/include/mach/clock.h | 2 +- include/configs/ti_armv7_keystone2.h | 8 ++++---- 5 files changed, 20 insertions(+), 20 deletions(-)
diff --git a/arch/arm/include/asm/ti-common/keystone_net.h b/arch/arm/include/asm/ti-common/keystone_net.h index a0d0d9b..0627728 100644 --- a/arch/arm/include/asm/ti-common/keystone_net.h +++ b/arch/arm/include/asm/ti-common/keystone_net.h @@ -51,9 +51,9 @@
/* MDIO module input frequency */ #ifdef CONFIG_SOC_K2G -#define EMAC_MDIO_BUS_FREQ (clk_get_rate(sys_clk0_3_clk)) +#define EMAC_MDIO_BUS_FREQ (ks_clk_get_rate(sys_clk0_3_clk)) #else -#define EMAC_MDIO_BUS_FREQ (clk_get_rate(pass_pll_clk)) +#define EMAC_MDIO_BUS_FREQ (ks_clk_get_rate(pass_pll_clk)) #endif /* MDIO clock output frequency */ #define EMAC_MDIO_CLOCK_FREQ 2500000 /* 2.5 MHz */ diff --git a/arch/arm/mach-keystone/clock.c b/arch/arm/mach-keystone/clock.c index b25db1e..d8804724 100644 --- a/arch/arm/mach-keystone/clock.c +++ b/arch/arm/mach-keystone/clock.c @@ -341,7 +341,7 @@ static unsigned long pll_freq_get(int pll) return ret; }
-unsigned long clk_get_rate(unsigned int clk) +unsigned long ks_clk_get_rate(unsigned int clk) { unsigned long freq = 0;
@@ -381,37 +381,37 @@ unsigned long clk_get_rate(unsigned int clk) freq = pll_freq_get(CORE_PLL) / pll0div_read(4); break; case sys_clk0_2_clk:
freq = clk_get_rate(sys_clk0_clk) / 2;
break; case sys_clk0_3_clk:freq = ks_clk_get_rate(sys_clk0_clk) / 2;
freq = clk_get_rate(sys_clk0_clk) / 3;
break; case sys_clk0_4_clk:freq = ks_clk_get_rate(sys_clk0_clk) / 3;
freq = clk_get_rate(sys_clk0_clk) / 4;
break; case sys_clk0_6_clk:freq = ks_clk_get_rate(sys_clk0_clk) / 4;
freq = clk_get_rate(sys_clk0_clk) / 6;
break; case sys_clk0_8_clk:freq = ks_clk_get_rate(sys_clk0_clk) / 6;
freq = clk_get_rate(sys_clk0_clk) / 8;
break; case sys_clk0_12_clk:freq = ks_clk_get_rate(sys_clk0_clk) / 8;
freq = clk_get_rate(sys_clk0_clk) / 12;
break; case sys_clk0_24_clk:freq = ks_clk_get_rate(sys_clk0_clk) / 12;
freq = clk_get_rate(sys_clk0_clk) / 24;
break; case sys_clk1_3_clk:freq = ks_clk_get_rate(sys_clk0_clk) / 24;
freq = clk_get_rate(sys_clk1_clk) / 3;
break; case sys_clk1_4_clk:freq = ks_clk_get_rate(sys_clk1_clk) / 3;
freq = clk_get_rate(sys_clk1_clk) / 4;
break; case sys_clk1_6_clk:freq = ks_clk_get_rate(sys_clk1_clk) / 4;
freq = clk_get_rate(sys_clk1_clk) / 6;
break; case sys_clk1_12_clk:freq = ks_clk_get_rate(sys_clk1_clk) / 6;
freq = clk_get_rate(sys_clk1_clk) / 12;
break; default: break;freq = ks_clk_get_rate(sys_clk1_clk) / 12;
diff --git a/arch/arm/mach-keystone/cmd_clock.c b/arch/arm/mach-keystone/cmd_clock.c index 3d5cf3f..06afa72 100644 --- a/arch/arm/mach-keystone/cmd_clock.c +++ b/arch/arm/mach-keystone/cmd_clock.c @@ -74,7 +74,7 @@ int do_getclk_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
clk = simple_strtoul(argv[1], NULL, 10);
- freq = clk_get_rate(clk);
- freq = ks_clk_get_rate(clk); if (freq) printf("clock index [%d] - frequency %lu\n", clk, freq); else
diff --git a/arch/arm/mach-keystone/include/mach/clock.h b/arch/arm/mach-keystone/include/mach/clock.h index e2bdec1..0d8a944 100644 --- a/arch/arm/mach-keystone/include/mach/clock.h +++ b/arch/arm/mach-keystone/include/mach/clock.h @@ -125,7 +125,7 @@ extern int speeds[]; void init_plls(void); void init_pll(const struct pll_init_data *data); struct pll_init_data *get_pll_init_data(int pll); -unsigned long clk_get_rate(unsigned int clk); +unsigned long ks_clk_get_rate(unsigned int clk); int get_max_dev_speed(int *spds); int get_max_arm_speed(int *spds); void pll_pa_clk_sel(void); diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h index d8f0847..d7bfacc 100644 --- a/include/configs/ti_armv7_keystone2.h +++ b/include/configs/ti_armv7_keystone2.h @@ -68,14 +68,14 @@ #define CONFIG_CONS_INDEX 1
#ifndef CONFIG_SOC_K2G -#define CONFIG_SYS_NS16550_CLK clk_get_rate(KS2_CLK1_6) +#define CONFIG_SYS_NS16550_CLK ks_clk_get_rate(KS2_CLK1_6) #else -#define CONFIG_SYS_NS16550_CLK clk_get_rate(uart_pll_clk) / 2 +#define CONFIG_SYS_NS16550_CLK ks_clk_get_rate(uart_pll_clk) / 2 #endif
/* SPI Configuration */ #define CONFIG_DAVINCI_SPI -#define CONFIG_SYS_SPI_CLK clk_get_rate(KS2_CLK1_6) +#define CONFIG_SYS_SPI_CLK ks_clk_get_rate(KS2_CLK1_6) #define CONFIG_SF_DEFAULT_SPEED 30000000 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED #define CONFIG_SYS_SPI0 @@ -314,7 +314,7 @@ #include <asm/arch/hardware.h> #include <asm/arch/clock.h> #ifndef CONFIG_SOC_K2G -#define CONFIG_SYS_HZ_CLOCK clk_get_rate(KS2_CLK1_6) +#define CONFIG_SYS_HZ_CLOCK ks_clk_get_rate(KS2_CLK1_6) #else #define CONFIG_SYS_HZ_CLOCK external_clk[sys_clk] #endif