
On 13 August 2015 at 17:23, Stefan Roese sr@denx.de wrote:
Jagan,
On 13.08.2015 13:45, Jagan Teki wrote:
Please correct me if I'm wrong, but AFAIU this BAR thing (CONFIG_SPI_FLASH_BAR) doesn't support to address e.g. a 64MiB SPI flash contiguously. Only 16MiB areas. So for example its not possible to put UBI/UBIFS in such a big partition.
Stefan,
No, BAR is accessing flash > 16MiB in 3-byte addressing mode, for your example of 64MiB flash, it can grouped into 4 16MiB regions means 4 bank vales bank0 to bank3
Based on the sf read/erase/write flash offsets, that particular bank will enable an do the relevant operations.
In-spite of having 4 byte addressing operations BAR should do exactly same with existing 3-byte addressing.
Okay, thanks for the explanation. If this really is the case, and this BAR support will seamlessly enable the access to the complete flash area, then the 4-byte mode should really not be necessary.
I'm wondering though about 2 things:
a) Do all SPI NOR flash chips support this BAR mode?
Based on my experience, Micron, Winbond, Spansion and Macronix support these. Spansion call these as bank address register and rest are call it as Extended address register.
b) If yes, why isn't BAR enabled per default?
Bcz, of code size and the moment where I have added this support where very few flashes which are greater than 16MiB.
c) Why doesn't the Linux kernel use this BAR mode?
The only overhead with BAR as per the coding is concerns was, We need write the bar/extended address register based on the user input offset. that means flash ops like erase/read/write loop we need to check whether user is asking which bar then write that particular bar so-that flash region got changed for operations.
In-case of 4-byte addressing, probe will identify the addr_width and update the flash operation commands and flash ops will operate accordingly.
This may be the reason for Linux is not adding BAR and relied on 4-byte instead. Probably I will add it on Linux in future, but if we have any choose of using one-at-a-time.
thanks!