Hello Andreas,
Am 15.06.2015 um 14:40 schrieb Heiko Schocher:
taurus changes:
- rename at91_spl_board_init to spl_board_init fixes problems with recovery button and nand erase sector 0
- adapt CONFIG_SPL_MAX_SIZE and CONFIG_SPL_BSS_MAX_SIZE
- add CONFIG_AT91_HW_WDT_TIMEOUT 15
- CONFIG_SF_DEFAULT_MODE SPI_MODE_3 not mode 0
Signed-off-by: Heiko Schocher hs@denx.de
board/siemens/taurus/taurus.c | 8 +++----- include/configs/taurus.h | 13 +++++++------ 2 files changed, 10 insertions(+), 11 deletions(-)
ping? I got no comments for this patch ... are there any issues?
Thanks!
bye, Heiko
diff --git a/board/siemens/taurus/taurus.c b/board/siemens/taurus/taurus.c index 554a0c2..d10411c 100644 --- a/board/siemens/taurus/taurus.c +++ b/board/siemens/taurus/taurus.c @@ -79,7 +79,7 @@ void matrix_init(void) &mat->scfg[3]); }
-void at91_spl_board_init(void) +void spl_board_init(void) { taurus_nand_hw_init(); at91_spi0_hw_init(TAURUS_SPI_MASK); @@ -92,9 +92,7 @@ void at91_spl_board_init(void) at91_set_gpio_output(AT91_PIN_PA10, 0); at91_set_gpio_output(AT91_PIN_PA11, 0); at91_set_gpio_output(AT91_PIN_PA12, 0); -#endif
-#if defined(CONFIG_BOARD_AXM) /* Configure recovery button PINs */ at91_set_gpio_input(AT91_PIN_PA26, 1); at91_set_gpio_input(AT91_PIN_PA27, 1); @@ -113,13 +111,13 @@ void at91_spl_board_init(void) #endif struct spi_flash *flash;
debug("Recovery button pressed\n");
puts("Recovery button pressed\n");
SPI_MODE_3);
CONFIG_SF_DEFAULT_MODE);diff --git a/include/configs/taurus.h b/include/configs/taurus.h index 6d18f2f..dd35a8f 100644 --- a/include/configs/taurus.h +++ b/include/configs/taurus.h @@ -95,7 +95,7 @@
- leaving the correct space for initial global data structure above
- that address while providing maximum stack area below.
*/ -# define CONFIG_SYS_INIT_SP_ADDR \ +#define CONFIG_SYS_INIT_SP_ADDR \ (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
/* NAND flash */ @@ -119,6 +119,7 @@ #define CONFIG_AT91_WANTS_COMMON_PHY
#define CONFIG_AT91SAM9_WATCHDOG +#define CONFIG_AT91_HW_WDT_TIMEOUT 15 #if !defined(CONFIG_SPL_BUILD) /* Enable the watchdog */ #define CONFIG_HW_WATCHDOG @@ -154,8 +155,8 @@ #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
#define CONFIG_SF_DEFAULT_BUS 0 -#define CONFIG_SF_DEFAULT_SPEED 10000000 -#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 +#define CONFIG_SF_DEFAULT_SPEED 1000000 +#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 #endif
/* load address */ @@ -255,14 +256,14 @@ /* Defines for SPL */ #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_TEXT_BASE 0x0 -#define CONFIG_SPL_MAX_SIZE (15 * 1024) -#define CONFIG_SPL_STACK (16 * 1024) +#define CONFIG_SPL_MAX_SIZE (29 * 512) +#define CONFIG_SPL_STACK (ATMEL_BASE_SRAM1 + 0x4000) #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \ CONFIG_SYS_MALLOC_LEN) #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN
#define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE -#define CONFIG_SPL_BSS_MAX_SIZE (3 * 1024) +#define CONFIG_SPL_BSS_MAX_SIZE (3 * 512)
#define CONFIG_SPL_LIBCOMMON_SUPPORT #define CONFIG_SPL_LIBGENERIC_SUPPORT