From: Stephen Warren swarren@nvidia.com
These defines are used with APIs in pinmux.h, so it makes sense to put them into the same header. It also allows all includes of gp_padctrl.h to be removed from code outside arch/arm/mach-tegra/.
Signed-off-by: Stephen Warren swarren@nvidia.com --- arch/arm/include/asm/arch-tegra114/gp_padctrl.h | 8 +------- arch/arm/include/asm/arch-tegra114/pinmux.h | 8 +++++++- arch/arm/include/asm/arch-tegra124/gp_padctrl.h | 8 +------- arch/arm/include/asm/arch-tegra124/pinmux.h | 8 +++++++- arch/arm/include/asm/arch-tegra210/gp_padctrl.h | 8 +------- arch/arm/include/asm/arch-tegra210/pinmux.h | 8 +++++++- arch/arm/include/asm/arch-tegra30/gp_padctrl.h | 8 +------- arch/arm/include/asm/arch-tegra30/pinmux.h | 8 +++++++- board/avionic-design/common/tamonten-ng.c | 1 - board/nvidia/cardhu/cardhu.c | 1 - board/nvidia/dalmore/dalmore.c | 3 +-- board/toradex/apalis_t30/apalis_t30.c | 1 - 12 files changed, 33 insertions(+), 37 deletions(-)
diff --git a/arch/arm/include/asm/arch-tegra114/gp_padctrl.h b/arch/arm/include/asm/arch-tegra114/gp_padctrl.h index 21fa4f2d4233..24416f4a5c52 100644 --- a/arch/arm/include/asm/arch-tegra114/gp_padctrl.h +++ b/arch/arm/include/asm/arch-tegra114/gp_padctrl.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2010-2016, NVIDIA CORPORATION. All rights reserved. * * SPDX-License-Identifier: GPL-2.0 */ @@ -64,10 +64,4 @@ struct apb_misc_gp_ctlr { u32 aocfg0; /* 0x1AC: APB_MISC_GP_AOCFG0PADCTRL */ };
-/* SDMMC1/3 settings from section 27.5 of T114 TRM */ -#define SDIOCFG_DRVUP_SLWF 0 -#define SDIOCFG_DRVDN_SLWR 0 -#define SDIOCFG_DRVUP 0x24 -#define SDIOCFG_DRVDN 0x14 - #endif /* _TEGRA114_GP_PADCTRL_H_ */ diff --git a/arch/arm/include/asm/arch-tegra114/pinmux.h b/arch/arm/include/asm/arch-tegra114/pinmux.h index 38d8b9cf4d03..c96fd096695b 100644 --- a/arch/arm/include/asm/arch-tegra114/pinmux.h +++ b/arch/arm/include/asm/arch-tegra114/pinmux.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010-2014, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2010-2016, NVIDIA CORPORATION. All rights reserved. * * SPDX-License-Identifier: GPL-2.0+ */ @@ -313,6 +313,12 @@ enum pmux_func { PMUX_FUNC_COUNT, };
+/* SDMMC1/3 settings from section 27.5 of T114 TRM */ +#define SDIOCFG_DRVUP_SLWF 0 +#define SDIOCFG_DRVDN_SLWR 0 +#define SDIOCFG_DRVUP 0x24 +#define SDIOCFG_DRVDN 0x14 + #define TEGRA_PMX_SOC_DRV_GROUP_BASE_REG 0x868 #define TEGRA_PMX_SOC_HAS_IO_CLAMPING #define TEGRA_PMX_SOC_HAS_DRVGRPS diff --git a/arch/arm/include/asm/arch-tegra124/gp_padctrl.h b/arch/arm/include/asm/arch-tegra124/gp_padctrl.h index 440cbbfa3ed3..406edd0d7ea6 100644 --- a/arch/arm/include/asm/arch-tegra124/gp_padctrl.h +++ b/arch/arm/include/asm/arch-tegra124/gp_padctrl.h @@ -1,5 +1,5 @@ /* - * (C) Copyright 2010-2013 + * (C) Copyright 2010-2016 * NVIDIA Corporation <www.nvidia.com> * * SPDX-License-Identifier: GPL-2.0+ @@ -65,10 +65,4 @@ struct apb_misc_gp_ctlr { u32 aocfg0; /* 0x1AC: APB_MISC_GP_AOCFG0PADCTRL */ };
-/* SDMMC1/3 settings from section 27.5 of T114 TRM */ -#define SDIOCFG_DRVUP_SLWF 0 -#define SDIOCFG_DRVDN_SLWR 0 -#define SDIOCFG_DRVUP 0x24 -#define SDIOCFG_DRVDN 0x14 - #endif /* _TEGRA124_GP_PADCTRL_H_ */ diff --git a/arch/arm/include/asm/arch-tegra124/pinmux.h b/arch/arm/include/asm/arch-tegra124/pinmux.h index 9fcbb0f80b4b..31b921f4ae71 100644 --- a/arch/arm/include/asm/arch-tegra124/pinmux.h +++ b/arch/arm/include/asm/arch-tegra124/pinmux.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013-2014, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2013-2016, NVIDIA CORPORATION. All rights reserved. * * SPDX-License-Identifier: GPL-2.0+ */ @@ -342,6 +342,12 @@ enum pmux_func { PMUX_FUNC_COUNT, };
+/* SDMMC1/3 settings from section 27.5 of T114 TRM */ +#define SDIOCFG_DRVUP_SLWF 0 +#define SDIOCFG_DRVDN_SLWR 0 +#define SDIOCFG_DRVUP 0x24 +#define SDIOCFG_DRVDN 0x14 + #define TEGRA_PMX_SOC_DRV_GROUP_BASE_REG 0x868 #define TEGRA_PMX_SOC_MIPIPADCTRL_BASE_REG 0x820 #define TEGRA_PMX_SOC_HAS_IO_CLAMPING diff --git a/arch/arm/include/asm/arch-tegra210/gp_padctrl.h b/arch/arm/include/asm/arch-tegra210/gp_padctrl.h index fb69baf98678..ead620534c7d 100644 --- a/arch/arm/include/asm/arch-tegra210/gp_padctrl.h +++ b/arch/arm/include/asm/arch-tegra210/gp_padctrl.h @@ -1,5 +1,5 @@ /* - * (C) Copyright 2010-2015 + * (C) Copyright 2010-2016 * NVIDIA Corporation <www.nvidia.com> * * SPDX-License-Identifier: GPL-2.0+ @@ -65,10 +65,4 @@ struct apb_misc_gp_ctlr { u32 aocfg0; /* 0x1AC: APB_MISC_GP_AOCFG0PADCTRL */ };
-/* SDMMC1/3 settings from section 27.5 of T114 TRM */ -#define SDIOCFG_DRVUP_SLWF 0 -#define SDIOCFG_DRVDN_SLWR 0 -#define SDIOCFG_DRVUP 0x24 -#define SDIOCFG_DRVDN 0x14 - #endif /* _TEGRA210_GP_PADCTRL_H_ */ diff --git a/arch/arm/include/asm/arch-tegra210/pinmux.h b/arch/arm/include/asm/arch-tegra210/pinmux.h index af3b55f0d7b8..4772d96101c9 100644 --- a/arch/arm/include/asm/arch-tegra210/pinmux.h +++ b/arch/arm/include/asm/arch-tegra210/pinmux.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2015-2016, NVIDIA CORPORATION. All rights reserved. * * SPDX-License-Identifier: GPL-2.0+ */ @@ -404,6 +404,12 @@ enum pmux_func { PMUX_FUNC_COUNT, };
+/* SDMMC1/3 settings from section 27.5 of T114 TRM */ +#define SDIOCFG_DRVUP_SLWF 0 +#define SDIOCFG_DRVDN_SLWR 0 +#define SDIOCFG_DRVUP 0x24 +#define SDIOCFG_DRVDN 0x14 + #define TEGRA_PMX_SOC_DRV_GROUP_BASE_REG 0x8d4 #define TEGRA_PMX_SOC_HAS_IO_CLAMPING #define TEGRA_PMX_SOC_HAS_DRVGRPS diff --git a/arch/arm/include/asm/arch-tegra30/gp_padctrl.h b/arch/arm/include/asm/arch-tegra30/gp_padctrl.h index 1c5017686ce9..5453555d3ea3 100644 --- a/arch/arm/include/asm/arch-tegra30/gp_padctrl.h +++ b/arch/arm/include/asm/arch-tegra30/gp_padctrl.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2010-2016, NVIDIA CORPORATION. All rights reserved. * * SPDX-License-Identifier: GPL-2.0 */ @@ -46,10 +46,4 @@ struct apb_misc_gp_ctlr { u32 sdio1cfg; /* 0xEC: APB_MISC_GP_SDIO1CFGPADCTRL */ };
-/* SDMMC1/3 settings from section 24.6 of T30 TRM */ -#define SDIOCFG_DRVUP_SLWF 1 -#define SDIOCFG_DRVDN_SLWR 1 -#define SDIOCFG_DRVUP 0x2E -#define SDIOCFG_DRVDN 0x2A - #endif /* _TEGRA30_GP_PADCTRL_H_ */ diff --git a/arch/arm/include/asm/arch-tegra30/pinmux.h b/arch/arm/include/asm/arch-tegra30/pinmux.h index 3358bf7ce386..6f4e2899b963 100644 --- a/arch/arm/include/asm/arch-tegra30/pinmux.h +++ b/arch/arm/include/asm/arch-tegra30/pinmux.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010-2014, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2010-2016, NVIDIA CORPORATION. All rights reserved. * * SPDX-License-Identifier: GPL-2.0+ */ @@ -391,6 +391,12 @@ enum pmux_func { PMUX_FUNC_COUNT, };
+/* SDMMC1/3 settings from section 24.6 of T30 TRM */ +#define SDIOCFG_DRVUP_SLWF 1 +#define SDIOCFG_DRVDN_SLWR 1 +#define SDIOCFG_DRVUP 0x2E +#define SDIOCFG_DRVDN 0x2A + #define TEGRA_PMX_SOC_DRV_GROUP_BASE_REG 0x868 #define TEGRA_PMX_SOC_HAS_DRVGRPS #define TEGRA_PMX_GRPS_HAVE_LPMD diff --git a/board/avionic-design/common/tamonten-ng.c b/board/avionic-design/common/tamonten-ng.c index aa1fd0ebce1e..6bff3285c73c 100644 --- a/board/avionic-design/common/tamonten-ng.c +++ b/board/avionic-design/common/tamonten-ng.c @@ -12,7 +12,6 @@ #include <dt-bindings/gpio/tegra-gpio.h> #include <asm/gpio.h> #include <asm/arch/pinmux.h> -#include <asm/arch/gp_padctrl.h> #include "pinmux-config-tamonten-ng.h"
#define PMU_I2C_ADDRESS 0x2D diff --git a/board/nvidia/cardhu/cardhu.c b/board/nvidia/cardhu/cardhu.c index ff46e0cf0419..edfe960428ac 100644 --- a/board/nvidia/cardhu/cardhu.c +++ b/board/nvidia/cardhu/cardhu.c @@ -11,7 +11,6 @@ #include <dt-bindings/gpio/tegra-gpio.h> #include <asm/gpio.h> #include <asm/arch/pinmux.h> -#include <asm/arch/gp_padctrl.h> #include "pinmux-config-cardhu.h"
#define PMU_I2C_ADDRESS 0x2D diff --git a/board/nvidia/dalmore/dalmore.c b/board/nvidia/dalmore/dalmore.c index e4c4bfbc6809..09adc74e0ede 100644 --- a/board/nvidia/dalmore/dalmore.c +++ b/board/nvidia/dalmore/dalmore.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2010-2016, NVIDIA CORPORATION. All rights reserved. * * SPDX-License-Identifier: GPL-2.0 */ @@ -7,7 +7,6 @@ #include <common.h> #include <dm.h> #include <asm/arch/pinmux.h> -#include <asm/arch/gp_padctrl.h> #include "pinmux-config-dalmore.h" #include <i2c.h>
diff --git a/board/toradex/apalis_t30/apalis_t30.c b/board/toradex/apalis_t30/apalis_t30.c index 8fdee023ee8a..e2a40db1afdd 100644 --- a/board/toradex/apalis_t30/apalis_t30.c +++ b/board/toradex/apalis_t30/apalis_t30.c @@ -7,7 +7,6 @@ */
#include <common.h> -#include <asm/arch/gp_padctrl.h> #include <asm/arch/pinmux.h> #include <asm/arch-tegra/tegra.h> #include <asm/gpio.h>