5 Apr
2019
5 Apr
'19
3:35 a.m.
On Wed, Mar 27, 2019 at 5:20 AM Stefan Roese sr@denx.de wrote:
I've noticed that the first ethernet packet after PHY link establishment is not tranferred correctly most of the time on my AT91SAM9G25 board. Here I usually see a timeout of a few seconds, which is quite annoying.
Adding a small delay (10ms in this case) after the link establishment helps to solve this problem. With this patch applied, this timeout on the first packet is not seen any more.
Signed-off-by: Stefan Roese sr@denx.de Cc: Wenyou Yang wenyou.yang@atmel.com Cc: Eugen Hristev eugen.hristev@microchip.com Cc: Joe Hershberger joe.hershberger@ni.com
Acked-by: Joe Hershberger joe.hershberger@ni.com