Hi David
IN order to test it on STM32, can you rebase this series on last master branch,
there was some update already merged that avoid to apply smoothly this series.
Thanks
Patrice
On 5/11/20 9:00 AM, David Wu wrote:
Rockchip Socs can support two controllers "snps, dwmac-4.20a" and "snps, dwmac-3.50". In order to support two at gmac-rockchip.c, export public interface functions and struct data, it will be more general for others.
Changes in v2:
- None
- Remove the code is not related (Patrice)
- None
- Don't change the Rx and Tx clock names. (Patrice, Stephen)
- None
- None
- Add the lost head file. (Patrice)
- None
- None
- None
- None
David Wu (11): net: dwc_eth_qos: Use dev_ functions calls to get FDT data net: dwc_eth_qos: Add option "snps,reset-gpio" phy-rst gpio for stm32 net: dwc_eth_qos: Move interface() to eqos_ops structure net: dwc_eth_qos: Make clk_rx and clk_tx optional net: dwc_eth_qos: Split eqos_start() to get link speed net: dwc_eth_qos: make eqos_start_clks and eqos_stop_clks optional net: dwc_eth_qos: Export common struct and interface at head file net: gmac_rockchip: Add dwc_eth_qos support net: dwc_eth_qos: Add eqos_rockchip_ops net: dwc_eth_qos: Add EQOS_MAC_MDIO_ADDRESS_CR_100_150 for Rockchip net: gmac_rockchip: Add RV1126 gmac support
drivers/net/Kconfig | 2 +- drivers/net/dwc_eth_qos.c | 273 ++++++++++++++++++------------------ drivers/net/dwc_eth_qos.h | 89 ++++++++++++ drivers/net/gmac_rockchip.c | 188 +++++++++++++++++++++---- 4 files changed, 390 insertions(+), 162 deletions(-) create mode 100644 drivers/net/dwc_eth_qos.h