This series of patches add the neccesary support for allowing multi-SEC SoCs, like the C292 & C293 to instantiate the respecting RNGs.
Alex Porosanu (3): arch/arm: add SEC JR0 offset arch/arm, arch/powerpc: add # of SEC engines on the SOC crypto/fsl: add support for multiple SEC engines initialization
arch/arm/include/asm/arch-fsl-layerscape/config.h | 2 + .../include/asm/arch-fsl-layerscape/immap_lsch2.h | 9 +- .../include/asm/arch-fsl-layerscape/immap_lsch3.h | 8 +- arch/arm/include/asm/arch-ls102xa/config.h | 2 + arch/arm/include/asm/arch-mx6/imx-regs.h | 9 +- arch/arm/include/asm/arch-mx7/imx-regs.h | 11 +- arch/powerpc/cpu/mpc85xx/cpu_init.c | 9 + arch/powerpc/include/asm/config_mpc85xx.h | 6 + board/freescale/c29xpcie/c29xpcie.c | 2 +- drivers/crypto/fsl/jr.c | 271 ++++++++++++--------- drivers/crypto/fsl/jr.h | 3 + include/fsl_sec.h | 6 +- 12 files changed, 210 insertions(+), 128 deletions(-)