TFABOOT support includes: - ls1046ardb_tfa_defconfig to be loaded by trusted firmware - environment address and size changes for TFABOOT - FMAN address changes for TFABOOT - define BOOTCOMMAND for TFABOOT
Signed-off-by: York Sun york.sun@nxp.com Signed-off-by: Pankit Garg pankit.garg@nxp.com Signed-off-by: Rajesh Bhagat rajesh.bhagat@nxp.com --- Change in v2: - Merged ls1046ardb TFA boot support patches - Removed extra CONFIG_TFABOOT flag usage
arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 7 ++++ arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 9 +++-- board/freescale/ls1046ardb/ddr.c | 12 ++++++ configs/ls1046ardb_tfa_defconfig | 49 +++++++++++++++++++++++ include/configs/ls1046a_common.h | 12 ++++++ include/configs/ls1046ardb.h | 15 +++++++ 6 files changed, 101 insertions(+), 3 deletions(-) create mode 100644 configs/ls1046ardb_tfa_defconfig
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 1b84da5f66..1872c66dcd 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -514,3 +514,10 @@ config HAS_FSL_XHCI_USB help For some SoC(such as LS1043A and LS1046A), USB and QE-HDLC multiplex use pins, select it when the pins are assigned to USB. + +config TFABOOT + bool "Support for booting from TFA" + default n + help + Enabling this will make a U-Boot binary that is capable of being + booted via TFA. diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index 335f609eaa..2e3494bee4 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -95,7 +95,8 @@ static struct mm_region early_map[] = { #endif { CONFIG_SYS_FSL_DRAM_BASE1, CONFIG_SYS_FSL_DRAM_BASE1, CONFIG_SYS_FSL_DRAM_SIZE1, -#if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD) +#if defined(CONFIG_TFABOOT) || \ + (defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD)) PTE_BLOCK_MEMTYPE(MT_NORMAL) | #else /* Start with nGnRnE and PXN and UXN to prevent speculative access */ PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_PXN | PTE_BLOCK_UXN | @@ -146,7 +147,8 @@ static struct mm_region early_map[] = { #endif { CONFIG_SYS_FSL_DRAM_BASE1, CONFIG_SYS_FSL_DRAM_BASE1, CONFIG_SYS_FSL_DRAM_SIZE1, -#if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD) +#if defined(CONFIG_TFABOOT) || \ + (defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD)) PTE_BLOCK_MEMTYPE(MT_NORMAL) | #else /* Start with nGnRnE and PXN and UXN to prevent speculative access */ PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_PXN | PTE_BLOCK_UXN | @@ -1542,7 +1544,8 @@ void update_early_mmu_table(void) __weak int dram_init(void) { fsl_initdram(); -#if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) +#if (!defined(CONFIG_SPL) && !defined(CONFIG_TFABOOT)) || \ + defined(CONFIG_SPL_BUILD) /* This will break-before-make MMU for DDR */ update_early_mmu_table(); #endif diff --git a/board/freescale/ls1046ardb/ddr.c b/board/freescale/ls1046ardb/ddr.c index 82b1b1d9ea..321222d68d 100644 --- a/board/freescale/ls1046ardb/ddr.c +++ b/board/freescale/ls1046ardb/ddr.c @@ -97,6 +97,17 @@ found: popts->cpo_sample = 0x61; }
+#ifdef CONFIG_TFABOOT +int fsl_initdram(void) +{ + gd->ram_size = tfa_get_dram_size(); + + if (!gd->ram_size) + gd->ram_size = fsl_ddr_sdram_size(); + + return 0; +} +#else int fsl_initdram(void) { phys_size_t dram_size; @@ -117,3 +128,4 @@ int fsl_initdram(void)
return 0; } +#endif diff --git a/configs/ls1046ardb_tfa_defconfig b/configs/ls1046ardb_tfa_defconfig new file mode 100644 index 0000000000..5bc80ed24e --- /dev/null +++ b/configs/ls1046ardb_tfa_defconfig @@ -0,0 +1,49 @@ +CONFIG_ARM=y +CONFIG_TARGET_LS1046ARDB=y +CONFIG_SYS_TEXT_BASE=0x82000000 +CONFIG_QSPI_AHB_INIT=y +CONFIG_TFABOOT=y +CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y +CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 +CONFIG_FIT_VERBOSE=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTARGS=y +CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" +CONFIG_MISC_INIT_R=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_NAND=y +CONFIG_CMD_PCI=y +CONFIG_CMD_SF=y +CONFIG_CMD_USB=y +CONFIG_CMD_CACHE=y +CONFIG_MP=y +CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_DM=y +CONFIG_FSL_CAAM=y +CONFIG_FSL_ESDHC=y +CONFIG_SPI_FLASH=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_PHYLIB=y +CONFIG_PHY_GIGE=y +CONFIG_E1000=y +CONFIG_PCI=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_LAYERSCAPE=y +CONFIG_SYS_NS16550=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_FSL_QSPI=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_STORAGE=y diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index cdb73f644a..6e36c9339b 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -33,7 +33,11 @@ #include <asm/arch/stream_id_lsch2.h>
/* Link Definitions */ +#ifdef CONFIG_TFABOOT +#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE +#else #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0) +#endif
#define CONFIG_SKIP_LOWLEVEL_INIT
@@ -165,6 +169,13 @@ #define CONFIG_SYS_FM_MURAM_SIZE 0x60000 #endif
+#ifdef CONFIG_TFABOOT +#define CONFIG_SYS_FMAN_FW_ADDR 0x900000 +#define CONFIG_ENV_SPI_BUS 0 +#define CONFIG_ENV_SPI_CS 0 +#define CONFIG_ENV_SPI_MAX_HZ 1000000 +#define CONFIG_ENV_SPI_MODE 0x03 +#else #ifdef CONFIG_SD_BOOT /* * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is @@ -187,6 +198,7 @@ #define CONFIG_SYS_QE_FMAN_FW_IN_NOR #define CONFIG_SYS_FMAN_FW_ADDR 0x60900000 #endif +#endif #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) #endif diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h index ffca410b1a..cc1f5f5f55 100644 --- a/include/configs/ls1046ardb.h +++ b/include/configs/ls1046ardb.h @@ -160,6 +160,13 @@ #define CONFIG_ENV_OVERWRITE #endif
+#ifdef CONFIG_TFABOOT +#define CONFIG_SYS_MMC_ENV_DEV 0 + +#define CONFIG_ENV_SIZE 0x2000 /* 8KB */ +#define CONFIG_ENV_OFFSET 0x500000 /* 5MB */ +#define CONFIG_ENV_SECT_SIZE 0x40000 /* 256KB */ +#else #if defined(CONFIG_SD_BOOT) #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_ENV_OFFSET (3 * 1024 * 1024) @@ -169,6 +176,7 @@ #define CONFIG_ENV_OFFSET 0x300000 /* 3MB */ #define CONFIG_ENV_SECT_SIZE 0x40000 /* 256KB */ #endif +#endif
#define AQR105_IRQ_MASK 0x80000000 /* FMan */ @@ -208,6 +216,12 @@
#ifndef SPL_NO_MISC #undef CONFIG_BOOTCOMMAND +#ifdef CONFIG_TFABOOT +#define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; " \ + "env exists secureboot && esbc_halt;;" +#define SD_BOOTCOMMAND "run distro_bootcmd;run sd_bootcmd; " \ + "env exists secureboot && esbc_halt;" +#else #if defined(CONFIG_QSPI_BOOT) #define CONFIG_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; " \ "env exists secureboot && esbc_halt;;" @@ -216,6 +230,7 @@ "env exists secureboot && esbc_halt;" #endif #endif +#endif
#include <asm/fsl_secure_boot.h>