[U-Boot] [Patch v3 1/6] Driver/DDR: Moving Freescale DDR driver to a common driver

18 Nov 2013

Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs.
The similar DDR controllers will be used for ARM-based SoCs.
Signed-off-by: York Sun yorksun@freescale.com
---
Change log
 v3: Split the patch again to separate "combine ccsr_ddr for 83xx, 85xx and 86xx"
     Fix git bisect broken caused by v1 patch.
 v2: Replace macro CONFIG_FSL_DDR1 with CONFIG_SYS_FSL_DDR1
     same to CONFIG_FSL_DDR2, CONFIG_FSL_DDR3
     Replace macro CONFIG_SYS_FSL_DDR_PPC_GEN1 with CONFIG_SYS_FSL_DDRC_GEN3
     same to CONFIG_SYS_FSL_DDR_PPC_GEN2, CONFIG_SYS_FSL_DDR_PPC_GEN3
     Squash with v1 2/6 "combine ccsr_ddr for 83xx, 85xx and 86xx"
Makefile                                           |    4 +-
 README                                             |   41 ++++++++++--
 arch/powerpc/cpu/mpc83xx/Makefile                  |   12 +---
 arch/powerpc/cpu/mpc83xx/ecc.c                     |    4 +-
 arch/powerpc/cpu/mpc85xx/Makefile                  |   45 --------------
 arch/powerpc/cpu/mpc85xx/cpu.c                     |   16 ++---
 arch/powerpc/cpu/mpc85xx/mp.c                      |    2 +-
 arch/powerpc/cpu/mpc86xx/Makefile                  |    3 -
 arch/powerpc/cpu/mpc8xxx/ddr/Makefile              |   29 ---------
 arch/powerpc/include/asm/config.h                  |    6 ++
 arch/powerpc/include/asm/config_mpc85xx.h          |   13 ++++
 arch/powerpc/include/asm/config_mpc86xx.h          |    2 +
 arch/powerpc/include/asm/immap_83xx.h              |    6 +-
 arch/powerpc/include/asm/immap_85xx.h              |    6 +-
 arch/powerpc/include/asm/immap_86xx.h              |    4 +-
 board/exmeritus/hww1u1a/ddr.c                      |    4 +-
 board/exmeritus/hww1u1a/hww1u1a.c                  |    4 +-
 board/freescale/b4860qds/ddr.c                     |    6 +-
 board/freescale/bsc9131rdb/ddr.c                   |    4 +-
 board/freescale/bsc9131rdb/spl_minimal.c           |    4 +-
 board/freescale/bsc9132qds/bsc9132qds.c            |    4 +-
 board/freescale/bsc9132qds/ddr.c                   |    4 +-
 board/freescale/bsc9132qds/spl_minimal.c           |    4 +-
 board/freescale/c29xpcie/ddr.c                     |    4 +-
 board/freescale/corenet_ds/ddr.c                   |    4 +-
 board/freescale/corenet_ds/eth_p4080.c             |    2 +-
 board/freescale/corenet_ds/p3041ds_ddr.c           |    2 +-
 board/freescale/corenet_ds/p4080ds_ddr.c           |    2 +-
 board/freescale/corenet_ds/p5020ds_ddr.c           |    2 +-
 board/freescale/corenet_ds/p5040ds_ddr.c           |    2 +-
 board/freescale/mpc8349emds/Makefile               |    2 +-
 board/freescale/mpc8349emds/ddr.c                  |    4 +-
 board/freescale/mpc8349emds/mpc8349emds.c          |    6 +-
 board/freescale/mpc8536ds/ddr.c                    |    4 +-
 board/freescale/mpc8536ds/mpc8536ds.c              |    2 +-
 board/freescale/mpc8540ads/ddr.c                   |    4 +-
 board/freescale/mpc8540ads/mpc8540ads.c            |    4 +-
 board/freescale/mpc8541cds/ddr.c                   |    4 +-
 board/freescale/mpc8541cds/mpc8541cds.c            |    2 +-
 board/freescale/mpc8544ds/ddr.c                    |    4 +-
 board/freescale/mpc8544ds/mpc8544ds.c              |    2 +-
 board/freescale/mpc8548cds/ddr.c                   |    4 +-
 board/freescale/mpc8548cds/mpc8548cds.c            |    2 +-
 board/freescale/mpc8555cds/ddr.c                   |    4 +-
 board/freescale/mpc8555cds/mpc8555cds.c            |    2 +-
 board/freescale/mpc8560ads/ddr.c                   |    4 +-
 board/freescale/mpc8560ads/mpc8560ads.c            |    4 +-
 board/freescale/mpc8568mds/ddr.c                   |    4 +-
 board/freescale/mpc8568mds/mpc8568mds.c            |    2 +-
 board/freescale/mpc8569mds/ddr.c                   |    4 +-
 board/freescale/mpc8569mds/mpc8569mds.c            |    4 +-
 board/freescale/mpc8572ds/ddr.c                    |    4 +-
 board/freescale/mpc8572ds/mpc8572ds.c              |    2 +-
 board/freescale/mpc8610hpcd/Makefile               |    2 +-
 board/freescale/mpc8610hpcd/ddr.c                  |    4 +-
 board/freescale/mpc8610hpcd/mpc8610hpcd.c          |    2 +-
 board/freescale/mpc8641hpcn/Makefile               |    2 +-
 board/freescale/mpc8641hpcn/ddr.c                  |    4 +-
 board/freescale/mpc8641hpcn/mpc8641hpcn.c          |    2 +-
 board/freescale/p1010rdb/ddr.c                     |    4 +-
 board/freescale/p1010rdb/spl_minimal.c             |    4 +-
 board/freescale/p1022ds/ddr.c                      |    4 +-
 board/freescale/p1022ds/p1022ds.c                  |    2 +-
 board/freescale/p1022ds/spl_minimal.c              |    2 +-
 board/freescale/p1023rdb/ddr.c                     |    4 +-
 board/freescale/p1023rdb/p1023rdb.c                |    2 +-
 board/freescale/p1023rds/p1023rds.c                |    4 +-
 board/freescale/p1_p2_rdb/ddr.c                    |    2 +-
 board/freescale/p1_p2_rdb_pc/ddr.c                 |    4 +-
 board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c        |    2 +-
 board/freescale/p1_p2_rdb_pc/spl_minimal.c         |    2 +-
 board/freescale/p1_twr/ddr.c                       |    4 +-
 board/freescale/p1_twr/p1_twr.c                    |    2 +-
 board/freescale/p2020come/ddr.c                    |    4 +-
 board/freescale/p2020ds/ddr.c                      |    6 +-
 board/freescale/p2020ds/p2020ds.c                  |    4 +-
 board/freescale/p2041rdb/ddr.c                     |    4 +-
 board/freescale/t1040qds/ddr.c                     |    4 +-
 board/freescale/t104xrdb/ddr.c                     |    4 +-
 board/freescale/t4qds/ddr.c                        |    4 +-
 board/freescale/t4qds/eth.c                        |    2 +-
 board/gdsys/p1022/controlcenterd.c                 |    2 +-
 board/gdsys/p1022/ddr.c                            |    4 +-
 board/keymile/kmp204x/ddr.c                        |    4 +-
 board/sbc8548/Makefile                             |    2 +-
 board/sbc8548/ddr.c                                |    6 +-
 board/sbc8548/sbc8548.c                            |    2 +-
 board/sbc8641d/Makefile                            |    2 +-
 board/sbc8641d/ddr.c                               |    4 +-
 board/sbc8641d/sbc8641d.c                          |    2 +-
 board/socrates/Makefile                            |    2 +-
 board/socrates/ddr.c                               |    4 +-
 board/socrates/sdram.c                             |    4 +-
 board/stx/stxgp3/Makefile                          |    2 +-
 board/stx/stxgp3/ddr.c                             |    4 +-
 board/stx/stxgp3/stxgp3.c                          |    2 +-
 board/stx/stxssa/Makefile                          |    2 +-
 board/stx/stxssa/ddr.c                             |    4 +-
 board/stx/stxssa/stxssa.c                          |    2 +-
 board/xes/xpedite517x/ddr.c                        |    4 +-
 board/xes/xpedite517x/xpedite517x.c                |    2 +-
 board/xes/xpedite520x/ddr.c                        |    4 +-
 board/xes/xpedite537x/ddr.c                        |    4 +-
 board/xes/xpedite550x/ddr.c                        |    4 +-
 drivers/ddr/fsl/Makefile                           |   34 ++++++++++
 .../mpc8xxx/ddr => drivers/ddr/fsl}/ctrl_regs.c    |   65 ++++++++++----------
 .../ddr => drivers/ddr/fsl}/ddr1_dimm_params.c     |    4 +-
 .../ddr => drivers/ddr/fsl}/ddr2_dimm_params.c     |    4 +-
 .../ddr => drivers/ddr/fsl}/ddr3_dimm_params.c     |    4 +-
 .../mpc8xxx/ddr => drivers/ddr/fsl}/interactive.c  |   21 ++++---
 .../ddr/fsl}/lc_common_dimm_params.c               |   18 +++---
 .../cpu/mpc8xxx/ddr => drivers/ddr/fsl}/main.c     |    4 +-
 .../ddr/fsl/mpc85xx_ddr_gen1.c                     |    6 +-
 .../ddr/fsl/mpc85xx_ddr_gen2.c                     |    4 +-
 .../ddr/fsl/mpc85xx_ddr_gen3.c                     |   16 ++---
 .../ddr-8641.c => drivers/ddr/fsl/mpc86xx_ddr.c    |    6 +-
 .../cpu/mpc8xxx/ddr => drivers/ddr/fsl}/options.c  |   32 +++++-----
 .../cpu/mpc8xxx/ddr => drivers/ddr/fsl}/util.c     |    9 +--
 .../mpc8xxx/ddr => include}/common_timing_params.h |    0
 include/configs/B4860QDS.h                         |    2 +-
 include/configs/BSC9131RDB.h                       |    2 +-
 include/configs/BSC9132QDS.h                       |    2 +-
 include/configs/C29XPCIE.h                         |    2 +-
 include/configs/HWW1U1A.h                          |    2 +-
 include/configs/MPC8349EMDS.h                      |    6 +-
 include/configs/MPC8536DS.h                        |    2 +-
 include/configs/MPC8540ADS.h                       |    2 +-
 include/configs/MPC8541CDS.h                       |    2 +-
 include/configs/MPC8544DS.h                        |    2 +-
 include/configs/MPC8548CDS.h                       |    2 +-
 include/configs/MPC8555CDS.h                       |    2 +-
 include/configs/MPC8560ADS.h                       |    2 +-
 include/configs/MPC8568MDS.h                       |    2 +-
 include/configs/MPC8569MDS.h                       |    2 +-
 include/configs/MPC8572DS.h                        |    2 +-
 include/configs/MPC8610HPCD.h                      |    2 +-
 include/configs/MPC8641HPCN.h                      |    2 +-
 include/configs/P1010RDB.h                         |    2 +-
 include/configs/P1022DS.h                          |    2 +-
 include/configs/P1023RDB.h                         |    2 +-
 include/configs/P1_P2_RDB.h                        |    2 +-
 include/configs/P2020COME.h                        |    2 +-
 include/configs/P2020DS.h                          |    4 +-
 include/configs/P2041RDB.h                         |    2 +-
 include/configs/T1040QDS.h                         |    2 +-
 include/configs/T1040RDB.h                         |    2 +-
 include/configs/T1042RDB_PI.h                      |    2 +-
 include/configs/controlcenterd.h                   |    2 +-
 include/configs/corenet_ds.h                       |    2 +-
 include/configs/km/kmp204x-common.h                |    2 +-
 include/configs/mpq101.h                           |    2 +-
 include/configs/p1_p2_rdb_pc.h                     |    2 +-
 include/configs/p1_twr.h                           |    2 +-
 include/configs/sbc8548.h                          |    2 +-
 include/configs/socrates.h                         |    2 +-
 include/configs/stxgp3.h                           |    2 +-
 include/configs/stxssa.h                           |    2 +-
 include/configs/t4qds.h                            |    2 +-
 include/configs/xpedite517x.h                      |    2 +-
 include/configs/xpedite520x.h                      |    2 +-
 include/configs/xpedite537x.h                      |    2 +-
 include/configs/xpedite550x.h                      |    2 +-
 .../cpu/mpc8xxx/ddr/ddr.h => include/fsl_ddr.h     |    6 +-
 .../include/asm => include}/fsl_ddr_dimm_params.h  |    0
 .../include/asm => include}/fsl_ddr_sdram.h        |    8 +--
 nand_spl/board/freescale/mpc8569mds/nand_boot.c    |    2 +-
 nand_spl/board/freescale/p1023rds/nand_boot.c      |    4 +-
 nand_spl/board/freescale/p1_p2_rdb/nand_boot.c     |    2 +-
 spl/Makefile                                       |    2 +-
 169 files changed, 416 insertions(+), 412 deletions(-)
 delete mode 100644 arch/powerpc/cpu/mpc8xxx/ddr/Makefile
 create mode 100644 drivers/ddr/fsl/Makefile
 rename {arch/powerpc/cpu/mpc8xxx/ddr => drivers/ddr/fsl}/ctrl_regs.c (97%)
 rename {arch/powerpc/cpu/mpc8xxx/ddr => drivers/ddr/fsl}/ddr1_dimm_params.c (99%)
 rename {arch/powerpc/cpu/mpc8xxx/ddr => drivers/ddr/fsl}/ddr2_dimm_params.c (99%)
 rename {arch/powerpc/cpu/mpc8xxx/ddr => drivers/ddr/fsl}/ddr3_dimm_params.c (99%)
 rename {arch/powerpc/cpu/mpc8xxx/ddr => drivers/ddr/fsl}/interactive.c (99%)
 rename {arch/powerpc/cpu/mpc8xxx/ddr => drivers/ddr/fsl}/lc_common_dimm_params.c (98%)
 rename {arch/powerpc/cpu/mpc8xxx/ddr => drivers/ddr/fsl}/main.c (99%)
 rename arch/powerpc/cpu/mpc85xx/ddr-gen1.c => drivers/ddr/fsl/mpc85xx_ddr_gen1.c (93%)
 rename arch/powerpc/cpu/mpc85xx/ddr-gen2.c => drivers/ddr/fsl/mpc85xx_ddr_gen2.c (96%)
 rename arch/powerpc/cpu/mpc85xx/ddr-gen3.c => drivers/ddr/fsl/mpc85xx_ddr_gen3.c (97%)
 rename arch/powerpc/cpu/mpc86xx/ddr-8641.c => drivers/ddr/fsl/mpc86xx_ddr.c (95%)
 rename {arch/powerpc/cpu/mpc8xxx/ddr => drivers/ddr/fsl}/options.c (97%)
 rename {arch/powerpc/cpu/mpc8xxx/ddr => drivers/ddr/fsl}/util.c (96%)
 rename {arch/powerpc/cpu/mpc8xxx/ddr => include}/common_timing_params.h (100%)
 rename arch/powerpc/cpu/mpc8xxx/ddr/ddr.h => include/fsl_ddr.h (97%)
 rename {arch/powerpc/include/asm => include}/fsl_ddr_dimm_params.h (100%)
 rename {arch/powerpc/include/asm => include}/fsl_ddr_sdram.h (98%)

diff --git a/Makefile b/Makefile
index 1f499c5..c53e346 100644
--- a/Makefile
+++ b/Makefile
@@ -273,19 +273,17 @@ LIBS-y += drivers/power/libpower.o \
 LIBS-y += drivers/spi/libspi.o
 ifeq ($(CPU),mpc83xx)
 LIBS-y += drivers/qe/libqe.o
-LIBS-y += arch/powerpc/cpu/mpc8xxx/ddr/libddr.o
 LIBS-y += arch/powerpc/cpu/mpc8xxx/lib8xxx.o
 endif
 ifeq ($(CPU),mpc85xx)
 LIBS-y += drivers/qe/libqe.o
 LIBS-y += drivers/net/fm/libfm.o
-LIBS-y += arch/powerpc/cpu/mpc8xxx/ddr/libddr.o
 LIBS-y += arch/powerpc/cpu/mpc8xxx/lib8xxx.o
 endif
 ifeq ($(CPU),mpc86xx)
-LIBS-y += arch/powerpc/cpu/mpc8xxx/ddr/libddr.o
 LIBS-y += arch/powerpc/cpu/mpc8xxx/lib8xxx.o
 endif
+LIBS-$(CONFIG_SYS_FSL_DDR) += drivers/ddr/fsl/libddr.o
 LIBS-y += drivers/serial/libserial.o
 LIBS-y += drivers/usb/eth/libusb_eth.o
 LIBS-y += drivers/usb/gadget/libusb_gadget.o
diff --git a/README b/README
index a70475f..2c2e6fc1 100644
--- a/README
+++ b/README
@@ -423,16 +423,47 @@ The following options need to be configured:
    	CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT
    	This value denotes start offset of DSP CCSR space.
-		CONFIG_SYS_FSL_DDR_EMU
-		Specify emulator support for DDR. Some DDR features such as
-		deskew training are not available.
-
 - Generic CPU options:
    	CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN
Defines the endianess of the CPU. Implementation of those
    	values is arch specific.
+		CONFIG_SYS_FSL_DDR
+		Freescale DDR driver in use. This type of DDR controller is
+		found in mpc83xx, mpc85xx, mpc86xx as well as some ARM core
+		SoCs.
+
+		CONFIG_SYS_FSL_DDR_ADDR
+		Freescale DDR memory-mapped register base.
+
+		CONFIG_SYS_FSL_DDR_EMU
+		Specify emulator support for DDR. Some DDR features such as
+		deskew training are not available.
+
+		CONFIG_SYS_FSL_DDRC_GEN1
+		Freescale DDR1 controller.
+
+		CONFIG_SYS_FSL_DDRC_GEN2
+		Freescale DDR2 controller.
+
+		CONFIG_SYS_FSL_DDRC_GEN3
+		Freescale DDR3 controller.
+
+		CONFIG_SYS_FSL_DDR1
+		Board config to use DDR1. It can be enabled for SoCs with
+		Freescale DDR1 or DDR2 controllers, depending on the board
+		implemetation.
+
+		CONFIG_SYS_FSL_DDR2
+		Board config to use DDR2. It can be eanbeld for SoCs with
+		Freescale DDR2 or DDR3 controllers, depending on the board
+		implementation.
+
+		CONFIG_SYS_FSL_DDR3
+		Board config to use DDR3. It can be enabled for SoCs with
+		Freescale DDR3 controllers.
+
 - Intel Monahans options:
    	CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO
@@ -3146,7 +3177,7 @@ FIT uImage format:
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
    	Set for the SPL on PPC mpc8xxx targets, support for
-		arch/powerpc/cpu/mpc8xxx/ddr/libddr.o in SPL binary.
+		drivers/ddr/fsl/libddr.o in SPL binary.
CONFIG_SPL_COMMON_INIT_DDR
    	Set for common ddr init with serial presence detect in
diff --git a/arch/powerpc/cpu/mpc83xx/Makefile b/arch/powerpc/cpu/mpc83xx/Makefile
index b7142f0..ac5b465 100644
--- a/arch/powerpc/cpu/mpc83xx/Makefile
+++ b/arch/powerpc/cpu/mpc83xx/Makefile
@@ -38,21 +38,15 @@ obj-$(CONFIG_OF_LIBFDT) += fdt.o
 # Stub implementations of cache management functions for USB
 obj-y += cache.o
-ifdef CONFIG_FSL_DDR2
+ifdef CONFIG_SYS_FSL_DDR2
 obj-$(CONFIG_MPC8349) += ddr-gen2.o
 SRCS += $(obj)ddr-gen2.c
 else
 obj-y += spd_sdram.o
 endif
-obj-$(CONFIG_FSL_DDR2) += law.o
+obj-$(CONFIG_SYS_FSL_DDR2) += law.o
endif # not minimal
-$(obj)ddr-gen1.c:
-	ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/ddr-gen1.c $(obj)ddr-gen1.c
-
 $(obj)ddr-gen2.c:
-	ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/ddr-gen2.c $(obj)ddr-gen2.c
-
-$(obj)ddr-gen3.c:
-	ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/ddr-gen3.c $(obj)ddr-gen3.c
+	ln -sf $(SRCTREE)/drivers/ddr/fsl/mpc85xx_ddr_gen2.c $(obj)ddr-gen2.c
diff --git a/arch/powerpc/cpu/mpc83xx/ecc.c b/arch/powerpc/cpu/mpc83xx/ecc.c
index 120b37b..6b7f72a 100644
--- a/arch/powerpc/cpu/mpc83xx/ecc.c
+++ b/arch/powerpc/cpu/mpc83xx/ecc.c
@@ -15,7 +15,7 @@
 void ecc_print_status(void)
 {
    immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
-#ifdef CONFIG_FSL_DDR2
+#ifdef CONFIG_SYS_FSL_DDR2
    ccsr_ddr_t *ddr = &immap->ddr;
 #else
    ddr83xx_t *ddr = &immap->ddr;
@@ -99,7 +99,7 @@ void ecc_print_status(void)
 int do_ecc(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
 {
    immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
-#ifdef CONFIG_FSL_DDR2
+#ifdef CONFIG_SYS_FSL_DDR2
    ccsr_ddr_t *ddr = &immap->ddr;
 #else
    ddr83xx_t *ddr = &immap->ddr;
diff --git a/arch/powerpc/cpu/mpc85xx/Makefile b/arch/powerpc/cpu/mpc85xx/Makefile
index a34014f..91c8402 100644
--- a/arch/powerpc/cpu/mpc85xx/Makefile
+++ b/arch/powerpc/cpu/mpc85xx/Makefile
@@ -29,51 +29,6 @@ obj-$(CONFIG_MP)	+= release.o
 obj-$(CONFIG_CMD_ERRATA) += cmd_errata.o
 obj-$(CONFIG_CPM2)	+= commproc.o
-# supports ddr1
-obj-$(CONFIG_MPC8540) += ddr-gen1.o
-obj-$(CONFIG_MPC8560) += ddr-gen1.o
-obj-$(CONFIG_MPC8541) += ddr-gen1.o
-obj-$(CONFIG_MPC8555) += ddr-gen1.o
-
-# supports ddr1/2
-obj-$(CONFIG_MPC8548) += ddr-gen2.o
-obj-$(CONFIG_MPC8568) += ddr-gen2.o
-obj-$(CONFIG_MPC8544) += ddr-gen2.o
-
-# supports ddr1/2/3
-obj-$(CONFIG_PPC_C29X)	+= ddr-gen3.o
-obj-$(CONFIG_MPC8572) += ddr-gen3.o
-obj-$(CONFIG_MPC8536) += ddr-gen3.o
-obj-$(CONFIG_MPC8569)	+= ddr-gen3.o
-obj-$(CONFIG_P1010)	+= ddr-gen3.o
-obj-$(CONFIG_P1011)	+= ddr-gen3.o
-obj-$(CONFIG_P1012)	+= ddr-gen3.o
-obj-$(CONFIG_P1013)	+= ddr-gen3.o
-obj-$(CONFIG_P1014)	+= ddr-gen3.o
-obj-$(CONFIG_P1020)	+= ddr-gen3.o
-obj-$(CONFIG_P1021)	+= ddr-gen3.o
-obj-$(CONFIG_P1022)	+= ddr-gen3.o
-obj-$(CONFIG_P1023)	+= ddr-gen3.o
-obj-$(CONFIG_P1024)	+= ddr-gen3.o
-obj-$(CONFIG_P1025)	+= ddr-gen3.o
-obj-$(CONFIG_P2010)	+= ddr-gen3.o
-obj-$(CONFIG_P2020)	+= ddr-gen3.o
-obj-$(CONFIG_PPC_P2041)	+= ddr-gen3.o
-obj-$(CONFIG_PPC_P3041)	+= ddr-gen3.o
-obj-$(CONFIG_PPC_P4080)	+= ddr-gen3.o
-obj-$(CONFIG_PPC_P5020)	+= ddr-gen3.o
-obj-$(CONFIG_PPC_P5040)	+= ddr-gen3.o
-obj-$(CONFIG_PPC_T4240)	+= ddr-gen3.o
-obj-$(CONFIG_PPC_T4160)	+= ddr-gen3.o
-obj-$(CONFIG_PPC_B4420)	+= ddr-gen3.o
-obj-$(CONFIG_PPC_B4860)	+= ddr-gen3.o
-obj-$(CONFIG_BSC9131)		+= ddr-gen3.o
-obj-$(CONFIG_BSC9132)		+= ddr-gen3.o
-obj-$(CONFIG_PPC_T1040)	+= ddr-gen3.o
-obj-$(CONFIG_PPC_T1042)	+= ddr-gen3.o
-obj-$(CONFIG_PPC_T1020)	+= ddr-gen3.o
-obj-$(CONFIG_PPC_T1022)	+= ddr-gen3.o
-
 obj-$(CONFIG_CPM2)	+= ether_fcc.o
 obj-$(CONFIG_OF_LIBFDT) += fdt.o
 obj-$(CONFIG_FSL_CORENET) += liodn.o
diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c
index 1a0196c..552acc6 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu.c
@@ -22,7 +22,7 @@
 #include <asm/fsl_lbc.h>
 #include <post.h>
 #include <asm/processor.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -453,21 +453,21 @@ static void dump_spd_ddr_reg(void)
    for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) {
    	switch (i) {
    	case 0:
-			ddr[i] = (void *)CONFIG_SYS_MPC8xxx_DDR_ADDR;
+			ddr[i] = (void *)CONFIG_SYS_FSL_DDR_ADDR;
    		break;
-#if defined(CONFIG_SYS_MPC8xxx_DDR2_ADDR) && (CONFIG_NUM_DDR_CONTROLLERS > 1)
+#if defined(CONFIG_SYS_FSL_DDR2_ADDR) && (CONFIG_NUM_DDR_CONTROLLERS > 1)
    	case 1:
-			ddr[i] = (void *)CONFIG_SYS_MPC8xxx_DDR2_ADDR;
+			ddr[i] = (void *)CONFIG_SYS_FSL_DDR2_ADDR;
    		break;
 #endif
-#if defined(CONFIG_SYS_MPC8xxx_DDR3_ADDR) && (CONFIG_NUM_DDR_CONTROLLERS > 2)
+#if defined(CONFIG_SYS_FSL_DDR3_ADDR) && (CONFIG_NUM_DDR_CONTROLLERS > 2)
    	case 2:
-			ddr[i] = (void *)CONFIG_SYS_MPC8xxx_DDR3_ADDR;
+			ddr[i] = (void *)CONFIG_SYS_FSL_DDR3_ADDR;
    		break;
 #endif
-#if defined(CONFIG_SYS_MPC8xxx_DDR4_ADDR) && (CONFIG_NUM_DDR_CONTROLLERS > 3)
+#if defined(CONFIG_SYS_FSL_DDR4_ADDR) && (CONFIG_NUM_DDR_CONTROLLERS > 3)
    	case 3:
-			ddr[i] = (void *)CONFIG_SYS_MPC8xxx_DDR4_ADDR;
+			ddr[i] = (void *)CONFIG_SYS_FSL_DDR4_ADDR;
    		break;
 #endif
    	default:
diff --git a/arch/powerpc/cpu/mpc85xx/mp.c b/arch/powerpc/cpu/mpc85xx/mp.c
index 5f198eb..88c8e65 100644
--- a/arch/powerpc/cpu/mpc85xx/mp.c
+++ b/arch/powerpc/cpu/mpc85xx/mp.c
@@ -11,7 +11,7 @@
 #include <asm/io.h>
 #include <asm/mmu.h>
 #include <asm/fsl_law.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
 #include "mp.h"
DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/powerpc/cpu/mpc86xx/Makefile b/arch/powerpc/cpu/mpc86xx/Makefile
index bcb786d..0f790b0 100644
--- a/arch/powerpc/cpu/mpc86xx/Makefile
+++ b/arch/powerpc/cpu/mpc86xx/Makefile
@@ -16,9 +16,6 @@ obj-$(CONFIG_MP) += release.o
obj-y	+= cpu.o
 obj-y	+= cpu_init.o
-# 8610 & 8641 are identical w/regards to DDR
-obj-$(CONFIG_MPC8610) += ddr-8641.o
-obj-$(CONFIG_MPC8641) += ddr-8641.o
 obj-$(CONFIG_OF_LIBFDT) += fdt.o
 obj-y	+= interrupts.o
 obj-$(CONFIG_MP) += mp.o
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/Makefile b/arch/powerpc/cpu/mpc8xxx/ddr/Makefile
deleted file mode 100644
index 8cbc06c..0000000
--- a/arch/powerpc/cpu/mpc8xxx/ddr/Makefile
+++ /dev/null
@@ -1,29 +0,0 @@
-#
-# Copyright 2008-2011 Freescale Semiconductor, Inc.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# Version 2 as published by the Free Software Foundation.
-#
-
-obj-$(CONFIG_FSL_DDR1)	+= main.o util.o ctrl_regs.o options.o \
-				   lc_common_dimm_params.o
-
-obj-$(CONFIG_FSL_DDR2)	+= main.o util.o ctrl_regs.o options.o \
-				   lc_common_dimm_params.o
-
-obj-$(CONFIG_FSL_DDR3)	+= main.o util.o ctrl_regs.o options.o \
-				   lc_common_dimm_params.o
-ifdef CONFIG_DDR_SPD
-SPD := y
-endif
-ifdef CONFIG_SPD_EEPROM
-SPD := y
-endif
-ifdef SPD
-obj-$(CONFIG_FSL_DDR1)	+= ddr1_dimm_params.o
-obj-$(CONFIG_FSL_DDR2)	+= ddr2_dimm_params.o
-obj-$(CONFIG_FSL_DDR3)	+= ddr3_dimm_params.o
-endif
-
-obj-$(CONFIG_FSL_DDR_INTERACTIVE) += interactive.o
diff --git a/arch/powerpc/include/asm/config.h b/arch/powerpc/include/asm/config.h
index 3c17c99..423a6fb 100644
--- a/arch/powerpc/include/asm/config.h
+++ b/arch/powerpc/include/asm/config.h
@@ -9,10 +9,16 @@
#ifdef CONFIG_MPC85xx
 #include <asm/config_mpc85xx.h>
+#define CONFIG_SYS_FSL_DDR
 #endif
#ifdef CONFIG_MPC86xx
 #include <asm/config_mpc86xx.h>
+#define CONFIG_SYS_FSL_DDR
+#endif
+
+#ifdef CONFIG_MPC83xx
+#define CONFIG_SYS_FSL_DDR
 #endif
#ifndef HWCONFIG_BUFFER_SIZE
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h
index d4cd27d..047fdf1 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -40,17 +40,20 @@
 #elif defined(CONFIG_MPC8540)
 #define CONFIG_MAX_CPUS			1
 #define CONFIG_SYS_FSL_NUM_LAWS		8
+#define CONFIG_SYS_FSL_DDRC_GEN1
 #define CONFIG_SYS_CCSRBAR_DEFAULT	0xff700000
#elif defined(CONFIG_MPC8541)
 #define CONFIG_MAX_CPUS			1
 #define CONFIG_SYS_FSL_NUM_LAWS		8
+#define CONFIG_SYS_FSL_DDRC_GEN1
 #define CONFIG_SYS_FSL_SEC_COMPAT	2
 #define CONFIG_SYS_CCSRBAR_DEFAULT	0xff700000
#elif defined(CONFIG_MPC8544)
 #define CONFIG_MAX_CPUS			1
 #define CONFIG_SYS_FSL_NUM_LAWS		10
+#define CONFIG_SYS_FSL_DDRC_GEN2
 #define CONFIG_SYS_PPC_E500_DEBUG_TLB	0
 #define CONFIG_SYS_FSL_SEC_COMPAT	2
 #define CONFIG_SYS_CCSRBAR_DEFAULT	0xff700000
@@ -59,6 +62,7 @@
 #elif defined(CONFIG_MPC8548)
 #define CONFIG_MAX_CPUS			1
 #define CONFIG_SYS_FSL_NUM_LAWS		10
+#define CONFIG_SYS_FSL_DDRC_GEN2
 #define CONFIG_SYS_PPC_E500_DEBUG_TLB	0
 #define CONFIG_SYS_FSL_SEC_COMPAT	2
 #define CONFIG_SYS_CCSRBAR_DEFAULT	0xff700000
@@ -77,17 +81,20 @@
 #elif defined(CONFIG_MPC8555)
 #define CONFIG_MAX_CPUS			1
 #define CONFIG_SYS_FSL_NUM_LAWS		8
+#define CONFIG_SYS_FSL_DDRC_GEN1
 #define CONFIG_SYS_FSL_SEC_COMPAT	2
 #define CONFIG_SYS_CCSRBAR_DEFAULT	0xff700000
#elif defined(CONFIG_MPC8560)
 #define CONFIG_MAX_CPUS			1
 #define CONFIG_SYS_FSL_NUM_LAWS		8
+#define CONFIG_SYS_FSL_DDRC_GEN1
 #define CONFIG_SYS_CCSRBAR_DEFAULT	0xff700000
#elif defined(CONFIG_MPC8568)
 #define CONFIG_MAX_CPUS			1
 #define CONFIG_SYS_FSL_NUM_LAWS		10
+#define CONFIG_SYS_FSL_DDRC_GEN2
 #define CONFIG_SYS_FSL_SEC_COMPAT	2
 #define QE_MURAM_SIZE			0x10000UL
 #define MAX_QE_RISC			2
@@ -738,4 +745,10 @@ defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022)
 #define CONFIG_SYS_FSL_THREADS_PER_CORE 1
 #endif
+#if !defined(CONFIG_SYS_FSL_DDRC_GEN1) && \
+	!defined(CONFIG_SYS_FSL_DDRC_GEN2) && \
+	!defined(CONFIG_SYS_FSL_DDRC_GEN3)
+#define CONFIG_SYS_FSL_DDRC_GEN3
+#endif
+
 #endif /* _ASM_MPC85xx_CONFIG_H_ */
diff --git a/arch/powerpc/include/asm/config_mpc86xx.h b/arch/powerpc/include/asm/config_mpc86xx.h
index 694b110..4f9b225 100644
--- a/arch/powerpc/include/asm/config_mpc86xx.h
+++ b/arch/powerpc/include/asm/config_mpc86xx.h
@@ -7,6 +7,8 @@
 #ifndef _ASM_MPC86xx_CONFIG_H_
 #define _ASM_MPC86xx_CONFIG_H_
+#define CONFIG_SYS_FSL_DDR_86XX
+
 /* SoC specific defines for Freescale MPC86xx processors */
#if defined(CONFIG_MPC8610)
diff --git a/arch/powerpc/include/asm/immap_83xx.h b/arch/powerpc/include/asm/immap_83xx.h
index 289f7ca..1042b0c 100644
--- a/arch/powerpc/include/asm/immap_83xx.h
+++ b/arch/powerpc/include/asm/immap_83xx.h
@@ -279,7 +279,7 @@ typedef struct qesba83xx {
 /*
  * DDR Memory Controller Memory Map
  */
-#if defined(CONFIG_FSL_DDR2) || defined(CONFIG_FSL_DDR3)
+#if defined(CONFIG_SYS_FSL_DDR2) || defined(CONFIG_SYS_FSL_DDR3)
 typedef struct ccsr_ddr {
    u32	cs0_bnds;		/* Chip Select 0 Memory Bounds */
    u8	res1[4];
@@ -739,7 +739,7 @@ typedef struct immap {
    u8			dll_ddr[0x100];
    u8			dll_lbc[0x100];
    u8			res1[0xE00];
-#if defined(CONFIG_FSL_DDR2) || defined(CONFIG_FSL_DDR3)
+#if defined(CONFIG_SYS_FSL_DDR2) || defined(CONFIG_SYS_FSL_DDR3)
    ccsr_ddr_t		ddr;	/* DDR Memory Controller Memory */
 #else
    ddr83xx_t		ddr;	/* DDR Memory Controller Memory */
@@ -1029,7 +1029,7 @@ typedef struct immap {
 #endif
#define CONFIG_SYS_MPC8xxx_DDR_OFFSET	(0x2000)
-#define CONFIG_SYS_MPC8xxx_DDR_ADDR \
+#define CONFIG_SYS_FSL_DDR_ADDR \
    		(CONFIG_SYS_IMMR + CONFIG_SYS_MPC8xxx_DDR_OFFSET)
 #define CONFIG_SYS_MPC83xx_DMA_OFFSET	(0x8000)
 #define CONFIG_SYS_MPC83xx_DMA_ADDR \
diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h
index 6312618..d479216 100644
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -3048,11 +3048,11 @@ struct ccsr_pman {
    (CONFIG_SYS_IMMR + CONFIG_SYS_FSL_CORENET_RCPM_OFFSET)
 #define CONFIG_SYS_MPC85xx_ECM_ADDR \
    (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_ECM_OFFSET)
-#define CONFIG_SYS_MPC8xxx_DDR_ADDR \
+#define CONFIG_SYS_FSL_DDR_ADDR \
    (CONFIG_SYS_IMMR + CONFIG_SYS_MPC8xxx_DDR_OFFSET)
-#define CONFIG_SYS_MPC8xxx_DDR2_ADDR \
+#define CONFIG_SYS_FSL_DDR2_ADDR \
    (CONFIG_SYS_IMMR + CONFIG_SYS_MPC8xxx_DDR2_OFFSET)
-#define CONFIG_SYS_MPC8xxx_DDR3_ADDR \
+#define CONFIG_SYS_FSL_DDR3_ADDR \
    (CONFIG_SYS_IMMR + CONFIG_SYS_MPC8xxx_DDR3_OFFSET)
 #define CONFIG_SYS_LBC_ADDR \
    (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_LBC_OFFSET)
diff --git a/arch/powerpc/include/asm/immap_86xx.h b/arch/powerpc/include/asm/immap_86xx.h
index 2a704fe..046a434 100644
--- a/arch/powerpc/include/asm/immap_86xx.h
+++ b/arch/powerpc/include/asm/immap_86xx.h
@@ -1253,9 +1253,9 @@ typedef struct immap {
 extern immap_t  *immr;
#define CONFIG_SYS_MPC8xxx_DDR_OFFSET	0x2000
-#define CONFIG_SYS_MPC8xxx_DDR_ADDR	(CONFIG_SYS_IMMR + CONFIG_SYS_MPC8xxx_DDR_OFFSET)
+#define CONFIG_SYS_FSL_DDR_ADDR	(CONFIG_SYS_IMMR + CONFIG_SYS_MPC8xxx_DDR_OFFSET)
 #define CONFIG_SYS_MPC8xxx_DDR2_OFFSET	0x6000
-#define CONFIG_SYS_MPC8xxx_DDR2_ADDR	(CONFIG_SYS_IMMR + CONFIG_SYS_MPC8xxx_DDR2_OFFSET)
+#define CONFIG_SYS_FSL_DDR2_ADDR	(CONFIG_SYS_IMMR + CONFIG_SYS_MPC8xxx_DDR2_OFFSET)
 #define CONFIG_SYS_MPC86xx_DMA_OFFSET	0x21000
 #define CONFIG_SYS_MPC86xx_DMA_ADDR	(CONFIG_SYS_IMMR + CONFIG_SYS_MPC86xx_DMA_OFFSET)
 #define CONFIG_SYS_MPC86xx_PIC_OFFSET	0x40000
diff --git a/board/exmeritus/hww1u1a/ddr.c b/board/exmeritus/hww1u1a/ddr.c
index 23a71d5..e1f6865 100644
--- a/board/exmeritus/hww1u1a/ddr.c
+++ b/board/exmeritus/hww1u1a/ddr.c
@@ -9,8 +9,8 @@
#include <common.h>
-#include <asm/fsl_ddr_sdram.h>
-#include <asm/fsl_ddr_dimm_params.h>
+#include <fsl_ddr_sdram.h>
+#include <fsl_ddr_dimm_params.h>
void fsl_ddr_board_options(memctl_options_t *popts,
    			dimm_params_t *pdimm,
diff --git a/board/exmeritus/hww1u1a/hww1u1a.c b/board/exmeritus/hww1u1a/hww1u1a.c
index 7c11e38..104987a 100644
--- a/board/exmeritus/hww1u1a/hww1u1a.c
+++ b/board/exmeritus/hww1u1a/hww1u1a.c
@@ -13,7 +13,7 @@
 #include <asm/cache.h>
 #include <asm/immap_85xx.h>
 #include <asm/fsl_pci.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
 #include <asm/io.h>
 #include <miiphy.h>
 #include <libfdt.h>
@@ -89,7 +89,7 @@ int checkboard(void)
     * and delay a while before we continue.
     */
    if (mpc85xx_gpio_get(GPIO_RESETS)) {
-		ccsr_ddr_t *ddr = (ccsr_ddr_t *)CONFIG_SYS_MPC8xxx_DDR_ADDR;
+		ccsr_ddr_t *ddr = (ccsr_ddr_t *)CONFIG_SYS_FSL_DDR_ADDR;
puts("Debugger detected... extra device reset enabled!\n");
diff --git a/board/freescale/b4860qds/ddr.c b/board/freescale/b4860qds/ddr.c
index 2d14923..187c3b3 100644
--- a/board/freescale/b4860qds/ddr.c
+++ b/board/freescale/b4860qds/ddr.c
@@ -9,11 +9,11 @@
 #include <common.h>
 #include <i2c.h>
 #include <hwconfig.h>
+#include <fsl_ddr.h>
 #include <asm/mmu.h>
-#include <asm/fsl_ddr_sdram.h>
-#include <asm/fsl_ddr_dimm_params.h>
+#include <fsl_ddr_sdram.h>
+#include <fsl_ddr_dimm_params.h>
 #include <asm/fsl_law.h>
-#include <../arch/powerpc/cpu/mpc8xxx/ddr/ddr.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/freescale/bsc9131rdb/ddr.c b/board/freescale/bsc9131rdb/ddr.c
index a9e92f2..339c576 100644
--- a/board/freescale/bsc9131rdb/ddr.c
+++ b/board/freescale/bsc9131rdb/ddr.c
@@ -8,8 +8,8 @@
 #include <asm/mmu.h>
 #include <asm/immap_85xx.h>
 #include <asm/processor.h>
-#include <asm/fsl_ddr_sdram.h>
-#include <asm/fsl_ddr_dimm_params.h>
+#include <fsl_ddr_sdram.h>
+#include <fsl_ddr_dimm_params.h>
 #include <asm/io.h>
 #include <asm/fsl_law.h>
diff --git a/board/freescale/bsc9131rdb/spl_minimal.c b/board/freescale/bsc9131rdb/spl_minimal.c
index dd5ea95..9746271 100644
--- a/board/freescale/bsc9131rdb/spl_minimal.c
+++ b/board/freescale/bsc9131rdb/spl_minimal.c
@@ -10,7 +10,7 @@
 #include <nand.h>
 #include <linux/compiler.h>
 #include <asm/fsl_law.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
 #include <asm/global_data.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -20,7 +20,7 @@ DECLARE_GLOBAL_DATA_PTR;
  */
 static void sdram_init(void)
 {
-	ccsr_ddr_t *ddr = (ccsr_ddr_t *)CONFIG_SYS_MPC8xxx_DDR_ADDR;
+	ccsr_ddr_t *ddr = (ccsr_ddr_t *)CONFIG_SYS_FSL_DDR_ADDR;
__raw_writel(CONFIG_SYS_DDR_CS0_BNDS, &ddr->cs0_bnds);
    __raw_writel(CONFIG_SYS_DDR_CS0_CONFIG, &ddr->cs0_config);
diff --git a/board/freescale/bsc9132qds/bsc9132qds.c b/board/freescale/bsc9132qds/bsc9132qds.c
index a895e4e..31bbf62 100644
--- a/board/freescale/bsc9132qds/bsc9132qds.c
+++ b/board/freescale/bsc9132qds/bsc9132qds.c
@@ -20,7 +20,7 @@
 #include <asm/fsl_ifc.h>
 #include <hwconfig.h>
 #include <i2c.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
#ifdef CONFIG_PCI
 #include <pci.h>
@@ -134,7 +134,7 @@ void dsp_ddr_configure(void)
     *to the DSP DDR controller as connected DDR memories are similar.
     */
    ccsr_ddr_t __iomem *pa_ddr =
-			(ccsr_ddr_t __iomem *)CONFIG_SYS_MPC8xxx_DDR_ADDR;
+			(ccsr_ddr_t __iomem *)CONFIG_SYS_FSL_DDR_ADDR;
    ccsr_ddr_t temp_ddr;
    ccsr_ddr_t __iomem *dsp_ddr =
    		(ccsr_ddr_t __iomem *)CONFIG_SYS_FSL_DSP_CCSR_DDR_ADDR;
diff --git a/board/freescale/bsc9132qds/ddr.c b/board/freescale/bsc9132qds/ddr.c
index b3130be..43f163a 100644
--- a/board/freescale/bsc9132qds/ddr.c
+++ b/board/freescale/bsc9132qds/ddr.c
@@ -8,8 +8,8 @@
 #include <asm/mmu.h>
 #include <asm/immap_85xx.h>
 #include <asm/processor.h>
-#include <asm/fsl_ddr_sdram.h>
-#include <asm/fsl_ddr_dimm_params.h>
+#include <fsl_ddr_sdram.h>
+#include <fsl_ddr_dimm_params.h>
 #include <asm/io.h>
 #include <asm/fsl_law.h>
diff --git a/board/freescale/bsc9132qds/spl_minimal.c b/board/freescale/bsc9132qds/spl_minimal.c
index 2bf0a0c..0249dc5 100644
--- a/board/freescale/bsc9132qds/spl_minimal.c
+++ b/board/freescale/bsc9132qds/spl_minimal.c
@@ -10,14 +10,14 @@
 #include <nand.h>
 #include <linux/compiler.h>
 #include <asm/fsl_law.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
 #include <asm/global_data.h>
DECLARE_GLOBAL_DATA_PTR;
static void sdram_init(void)
 {
-	ccsr_ddr_t *ddr = (ccsr_ddr_t *)CONFIG_SYS_MPC8xxx_DDR_ADDR;
+	ccsr_ddr_t *ddr = (ccsr_ddr_t *)CONFIG_SYS_FSL_DDR_ADDR;
 #if CONFIG_DDR_CLK_FREQ == 100000000
    __raw_writel(CONFIG_SYS_DDR_CS0_BNDS, &ddr->cs0_bnds);
    __raw_writel(CONFIG_SYS_DDR_CS0_CONFIG, &ddr->cs0_config);
diff --git a/board/freescale/c29xpcie/ddr.c b/board/freescale/c29xpcie/ddr.c
index 57a9b61..968655c 100644
--- a/board/freescale/c29xpcie/ddr.c
+++ b/board/freescale/c29xpcie/ddr.c
@@ -6,8 +6,8 @@
#include <common.h>
 #include <asm/fsl_law.h>
-#include <asm/fsl_ddr_sdram.h>
-#include <asm/fsl_ddr_dimm_params.h>
+#include <fsl_ddr_sdram.h>
+#include <fsl_ddr_dimm_params.h>
#include "cpld.h"
diff --git a/board/freescale/corenet_ds/ddr.c b/board/freescale/corenet_ds/ddr.c
index 18e2ff6..e7e893a 100644
--- a/board/freescale/corenet_ds/ddr.c
+++ b/board/freescale/corenet_ds/ddr.c
@@ -10,8 +10,8 @@
 #include <i2c.h>
 #include <hwconfig.h>
 #include <asm/mmu.h>
-#include <asm/fsl_ddr_sdram.h>
-#include <asm/fsl_ddr_dimm_params.h>
+#include <fsl_ddr_sdram.h>
+#include <fsl_ddr_dimm_params.h>
 #include <asm/fsl_law.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/freescale/corenet_ds/eth_p4080.c b/board/freescale/corenet_ds/eth_p4080.c
index e5beb55..5cbec7f 100644
--- a/board/freescale/corenet_ds/eth_p4080.c
+++ b/board/freescale/corenet_ds/eth_p4080.c
@@ -12,7 +12,7 @@
 #include <asm/cache.h>
 #include <asm/immap_85xx.h>
 #include <asm/fsl_law.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
 #include <asm/fsl_serdes.h>
 #include <asm/fsl_portals.h>
 #include <asm/fsl_liodn.h>
diff --git a/board/freescale/corenet_ds/p3041ds_ddr.c b/board/freescale/corenet_ds/p3041ds_ddr.c
index 5a8ed94..4dead9c 100644
--- a/board/freescale/corenet_ds/p3041ds_ddr.c
+++ b/board/freescale/corenet_ds/p3041ds_ddr.c
@@ -7,7 +7,7 @@
  */
#include <common.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
fixed_ddr_parm_t fixed_ddr_parm_0[] = {
    {0, 0, NULL}
diff --git a/board/freescale/corenet_ds/p4080ds_ddr.c b/board/freescale/corenet_ds/p4080ds_ddr.c
index 844e1d7..d572a5f 100644
--- a/board/freescale/corenet_ds/p4080ds_ddr.c
+++ b/board/freescale/corenet_ds/p4080ds_ddr.c
@@ -7,7 +7,7 @@
  */
#include <common.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
#define CONFIG_SYS_DDR_TIMING_3_1200	0x01030000
 #define CONFIG_SYS_DDR_TIMING_0_1200	0xCC550104
diff --git a/board/freescale/corenet_ds/p5020ds_ddr.c b/board/freescale/corenet_ds/p5020ds_ddr.c
index e65de36..9aaf6db 100644
--- a/board/freescale/corenet_ds/p5020ds_ddr.c
+++ b/board/freescale/corenet_ds/p5020ds_ddr.c
@@ -7,7 +7,7 @@
  */
#include <common.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
fixed_ddr_parm_t fixed_ddr_parm_0[] = {
    {0, 0, NULL}
diff --git a/board/freescale/corenet_ds/p5040ds_ddr.c b/board/freescale/corenet_ds/p5040ds_ddr.c
index e65de36..9aaf6db 100644
--- a/board/freescale/corenet_ds/p5040ds_ddr.c
+++ b/board/freescale/corenet_ds/p5040ds_ddr.c
@@ -7,7 +7,7 @@
  */
#include <common.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
fixed_ddr_parm_t fixed_ddr_parm_0[] = {
    {0, 0, NULL}
diff --git a/board/freescale/mpc8349emds/Makefile b/board/freescale/mpc8349emds/Makefile
index 23880f5..5c315f9 100644
--- a/board/freescale/mpc8349emds/Makefile
+++ b/board/freescale/mpc8349emds/Makefile
@@ -7,4 +7,4 @@
obj-y += mpc8349emds.o
 obj-$(CONFIG_PCI) += pci.o
-obj-$(CONFIG_FSL_DDR2) += ddr.o
+obj-$(CONFIG_SYS_FSL_DDR2) += ddr.o
diff --git a/board/freescale/mpc8349emds/ddr.c b/board/freescale/mpc8349emds/ddr.c
index 3d257d0..aae003d 100644
--- a/board/freescale/mpc8349emds/ddr.c
+++ b/board/freescale/mpc8349emds/ddr.c
@@ -6,8 +6,8 @@
#include <common.h>
-#include <asm/fsl_ddr_sdram.h>
-#include <asm/fsl_ddr_dimm_params.h>
+#include <fsl_ddr_sdram.h>
+#include <fsl_ddr_dimm_params.h>
struct board_specific_parameters {
    u32 n_ranks;
diff --git a/board/freescale/mpc8349emds/mpc8349emds.c b/board/freescale/mpc8349emds/mpc8349emds.c
index ec48487..d909220 100644
--- a/board/freescale/mpc8349emds/mpc8349emds.c
+++ b/board/freescale/mpc8349emds/mpc8349emds.c
@@ -12,8 +12,8 @@
 #include <i2c.h>
 #include <spi.h>
 #include <miiphy.h>
-#ifdef CONFIG_FSL_DDR2
-#include <asm/fsl_ddr_sdram.h>
+#ifdef CONFIG_SYS_FSL_DDR2
+#include <fsl_ddr_sdram.h>
 #else
 #include <spd_sdram.h>
 #endif
@@ -57,7 +57,7 @@ phys_size_t initdram (int board_type)
    /* DDR SDRAM - Main SODIMM */
    im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE & LAWBAR_BAR;
 #if defined(CONFIG_SPD_EEPROM)
-#ifndef CONFIG_FSL_DDR2
+#ifndef CONFIG_SYS_FSL_DDR2
    msize = spd_sdram() * 1024 * 1024;
 #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
    ddr_enable_ecc(msize);
diff --git a/board/freescale/mpc8536ds/ddr.c b/board/freescale/mpc8536ds/ddr.c
index d10370c..ebe3ba4 100644
--- a/board/freescale/mpc8536ds/ddr.c
+++ b/board/freescale/mpc8536ds/ddr.c
@@ -8,8 +8,8 @@
#include <common.h>
-#include <asm/fsl_ddr_sdram.h>
-#include <asm/fsl_ddr_dimm_params.h>
+#include <fsl_ddr_sdram.h>
+#include <fsl_ddr_dimm_params.h>
void fsl_ddr_board_options(memctl_options_t *popts,
    			dimm_params_t *pdimm,
diff --git a/board/freescale/mpc8536ds/mpc8536ds.c b/board/freescale/mpc8536ds/mpc8536ds.c
index 5daab69..59e9a35 100644
--- a/board/freescale/mpc8536ds/mpc8536ds.c
+++ b/board/freescale/mpc8536ds/mpc8536ds.c
@@ -12,7 +12,7 @@
 #include <asm/cache.h>
 #include <asm/immap_85xx.h>
 #include <asm/fsl_pci.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
 #include <asm/io.h>
 #include <asm/fsl_serdes.h>
 #include <spd.h>
diff --git a/board/freescale/mpc8540ads/ddr.c b/board/freescale/mpc8540ads/ddr.c
index 9e79815..41d4cfe 100644
--- a/board/freescale/mpc8540ads/ddr.c
+++ b/board/freescale/mpc8540ads/ddr.c
@@ -8,8 +8,8 @@
#include <common.h>
-#include <asm/fsl_ddr_sdram.h>
-#include <asm/fsl_ddr_dimm_params.h>
+#include <fsl_ddr_sdram.h>
+#include <fsl_ddr_dimm_params.h>
void fsl_ddr_board_options(memctl_options_t *popts,
    			dimm_params_t *pdimm,
diff --git a/board/freescale/mpc8540ads/mpc8540ads.c b/board/freescale/mpc8540ads/mpc8540ads.c
index 175eefc..97a5d19 100644
--- a/board/freescale/mpc8540ads/mpc8540ads.c
+++ b/board/freescale/mpc8540ads/mpc8540ads.c
@@ -14,7 +14,7 @@
 #include <asm/processor.h>
 #include <asm/mmu.h>
 #include <asm/immap_85xx.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
 #include <libfdt.h>
 #include <fdt_support.h>
@@ -168,7 +168,7 @@ void lbc_sdram_init(void)
 phys_size_t fixed_sdram(void)
 {
   #ifndef CONFIG_SYS_RAMBOOT
-	volatile ccsr_ddr_t *ddr= (void *)(CONFIG_SYS_MPC8xxx_DDR_ADDR);
+	volatile ccsr_ddr_t *ddr = (void *)(CONFIG_SYS_FSL_DDR_ADDR);
ddr->cs0_bnds = CONFIG_SYS_DDR_CS0_BNDS;
    ddr->cs0_config = CONFIG_SYS_DDR_CS0_CONFIG;
diff --git a/board/freescale/mpc8541cds/ddr.c b/board/freescale/mpc8541cds/ddr.c
index 78d73b0..d2ac6c4 100644
--- a/board/freescale/mpc8541cds/ddr.c
+++ b/board/freescale/mpc8541cds/ddr.c
@@ -8,8 +8,8 @@
#include <common.h>
-#include <asm/fsl_ddr_sdram.h>
-#include <asm/fsl_ddr_dimm_params.h>
+#include <fsl_ddr_sdram.h>
+#include <fsl_ddr_dimm_params.h>
void fsl_ddr_board_options(memctl_options_t *popts,
    			dimm_params_t *pdimm,
diff --git a/board/freescale/mpc8541cds/mpc8541cds.c b/board/freescale/mpc8541cds/mpc8541cds.c
index 8115e5c..7b264dd 100644
--- a/board/freescale/mpc8541cds/mpc8541cds.c
+++ b/board/freescale/mpc8541cds/mpc8541cds.c
@@ -11,7 +11,7 @@
 #include <asm/processor.h>
 #include <asm/mmu.h>
 #include <asm/immap_85xx.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
 #include <ioports.h>
 #include <spd_sdram.h>
 #include <libfdt.h>
diff --git a/board/freescale/mpc8544ds/ddr.c b/board/freescale/mpc8544ds/ddr.c
index 6cf9bc1..aa30cab 100644
--- a/board/freescale/mpc8544ds/ddr.c
+++ b/board/freescale/mpc8544ds/ddr.c
@@ -8,8 +8,8 @@
#include <common.h>
-#include <asm/fsl_ddr_sdram.h>
-#include <asm/fsl_ddr_dimm_params.h>
+#include <fsl_ddr_sdram.h>
+#include <fsl_ddr_dimm_params.h>
void fsl_ddr_board_options(memctl_options_t *popts,
    			dimm_params_t *pdimm,
diff --git a/board/freescale/mpc8544ds/mpc8544ds.c b/board/freescale/mpc8544ds/mpc8544ds.c
index dfd8fa6..1b33db6 100644
--- a/board/freescale/mpc8544ds/mpc8544ds.c
+++ b/board/freescale/mpc8544ds/mpc8544ds.c
@@ -11,7 +11,7 @@
 #include <asm/mmu.h>
 #include <asm/immap_85xx.h>
 #include <asm/fsl_pci.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
 #include <asm/fsl_serdes.h>
 #include <asm/io.h>
 #include <miiphy.h>
diff --git a/board/freescale/mpc8548cds/ddr.c b/board/freescale/mpc8548cds/ddr.c
index 996ffe2..b31ea34 100644
--- a/board/freescale/mpc8548cds/ddr.c
+++ b/board/freescale/mpc8548cds/ddr.c
@@ -8,8 +8,8 @@
#include <common.h>
-#include <asm/fsl_ddr_sdram.h>
-#include <asm/fsl_ddr_dimm_params.h>
+#include <fsl_ddr_sdram.h>
+#include <fsl_ddr_dimm_params.h>
void fsl_ddr_board_options(memctl_options_t *popts,
    			dimm_params_t *pdimm,
diff --git a/board/freescale/mpc8548cds/mpc8548cds.c b/board/freescale/mpc8548cds/mpc8548cds.c
index 51e4bb5..ca9b43c 100644
--- a/board/freescale/mpc8548cds/mpc8548cds.c
+++ b/board/freescale/mpc8548cds/mpc8548cds.c
@@ -12,7 +12,7 @@
 #include <asm/mmu.h>
 #include <asm/immap_85xx.h>
 #include <asm/fsl_pci.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
 #include <asm/fsl_serdes.h>
 #include <miiphy.h>
 #include <libfdt.h>
diff --git a/board/freescale/mpc8555cds/ddr.c b/board/freescale/mpc8555cds/ddr.c
index 78d73b0..d2ac6c4 100644
--- a/board/freescale/mpc8555cds/ddr.c
+++ b/board/freescale/mpc8555cds/ddr.c
@@ -8,8 +8,8 @@
#include <common.h>
-#include <asm/fsl_ddr_sdram.h>
-#include <asm/fsl_ddr_dimm_params.h>
+#include <fsl_ddr_sdram.h>
+#include <fsl_ddr_dimm_params.h>
void fsl_ddr_board_options(memctl_options_t *popts,
    			dimm_params_t *pdimm,
diff --git a/board/freescale/mpc8555cds/mpc8555cds.c b/board/freescale/mpc8555cds/mpc8555cds.c
index e2093d1..de5f566 100644
--- a/board/freescale/mpc8555cds/mpc8555cds.c
+++ b/board/freescale/mpc8555cds/mpc8555cds.c
@@ -9,7 +9,7 @@
 #include <asm/processor.h>
 #include <asm/mmu.h>
 #include <asm/immap_85xx.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
 #include <ioports.h>
 #include <spd_sdram.h>
 #include <libfdt.h>
diff --git a/board/freescale/mpc8560ads/ddr.c b/board/freescale/mpc8560ads/ddr.c
index 9e79815..41d4cfe 100644
--- a/board/freescale/mpc8560ads/ddr.c
+++ b/board/freescale/mpc8560ads/ddr.c
@@ -8,8 +8,8 @@
#include <common.h>
-#include <asm/fsl_ddr_sdram.h>
-#include <asm/fsl_ddr_dimm_params.h>
+#include <fsl_ddr_sdram.h>
+#include <fsl_ddr_dimm_params.h>
void fsl_ddr_board_options(memctl_options_t *popts,
    			dimm_params_t *pdimm,
diff --git a/board/freescale/mpc8560ads/mpc8560ads.c b/board/freescale/mpc8560ads/mpc8560ads.c
index 90a2522..7104e33 100644
--- a/board/freescale/mpc8560ads/mpc8560ads.c
+++ b/board/freescale/mpc8560ads/mpc8560ads.c
@@ -14,7 +14,7 @@
 #include <asm/processor.h>
 #include <asm/mmu.h>
 #include <asm/immap_85xx.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
 #include <ioports.h>
 #include <spd_sdram.h>
 #include <miiphy.h>
@@ -373,7 +373,7 @@ void lbc_sdram_init(void)
 phys_size_t fixed_sdram(void)
 {
   #ifndef CONFIG_SYS_RAMBOOT
-	volatile ccsr_ddr_t *ddr= (void *)(CONFIG_SYS_MPC8xxx_DDR_ADDR);
+	volatile ccsr_ddr_t *ddr = (void *)(CONFIG_SYS_FSL_DDR_ADDR);
ddr->cs0_bnds = CONFIG_SYS_DDR_CS0_BNDS;
    ddr->cs0_config = CONFIG_SYS_DDR_CS0_CONFIG;
diff --git a/board/freescale/mpc8568mds/ddr.c b/board/freescale/mpc8568mds/ddr.c
index b1f4f1f..6db92ef 100644
--- a/board/freescale/mpc8568mds/ddr.c
+++ b/board/freescale/mpc8568mds/ddr.c
@@ -8,8 +8,8 @@
#include <common.h>
-#include <asm/fsl_ddr_sdram.h>
-#include <asm/fsl_ddr_dimm_params.h>
+#include <fsl_ddr_sdram.h>
+#include <fsl_ddr_dimm_params.h>
void fsl_ddr_board_options(memctl_options_t *popts,
    			dimm_params_t *pdimm,
diff --git a/board/freescale/mpc8568mds/mpc8568mds.c b/board/freescale/mpc8568mds/mpc8568mds.c
index ae80697..a8fdcb5 100644
--- a/board/freescale/mpc8568mds/mpc8568mds.c
+++ b/board/freescale/mpc8568mds/mpc8568mds.c
@@ -12,7 +12,7 @@
 #include <asm/mmu.h>
 #include <asm/immap_85xx.h>
 #include <asm/fsl_pci.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
 #include <asm/fsl_serdes.h>
 #include <spd_sdram.h>
 #include <i2c.h>
diff --git a/board/freescale/mpc8569mds/ddr.c b/board/freescale/mpc8569mds/ddr.c
index 68f686b..ef404b1 100644
--- a/board/freescale/mpc8569mds/ddr.c
+++ b/board/freescale/mpc8569mds/ddr.c
@@ -8,8 +8,8 @@
#include <common.h>
-#include <asm/fsl_ddr_sdram.h>
-#include <asm/fsl_ddr_dimm_params.h>
+#include <fsl_ddr_sdram.h>
+#include <fsl_ddr_dimm_params.h>
void fsl_ddr_board_options(memctl_options_t *popts,
    			dimm_params_t *pdimm,
diff --git a/board/freescale/mpc8569mds/mpc8569mds.c b/board/freescale/mpc8569mds/mpc8569mds.c
index c928a96..60f5577 100644
--- a/board/freescale/mpc8569mds/mpc8569mds.c
+++ b/board/freescale/mpc8569mds/mpc8569mds.c
@@ -14,7 +14,7 @@
 #include <asm/cache.h>
 #include <asm/immap_85xx.h>
 #include <asm/fsl_pci.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
 #include <asm/fsl_serdes.h>
 #include <asm/io.h>
 #include <spd_sdram.h>
@@ -231,7 +231,7 @@ int checkboard (void)
 #if !defined(CONFIG_SPD_EEPROM)
 phys_size_t fixed_sdram(void)
 {
-	volatile ccsr_ddr_t *ddr = (ccsr_ddr_t *)CONFIG_SYS_MPC8xxx_DDR_ADDR;
+	volatile ccsr_ddr_t *ddr = (ccsr_ddr_t *)CONFIG_SYS_FSL_DDR_ADDR;
    uint d_init;
out_be32(&ddr->cs0_bnds, CONFIG_SYS_DDR_CS0_BNDS);
diff --git a/board/freescale/mpc8572ds/ddr.c b/board/freescale/mpc8572ds/ddr.c
index 52e4f42..2bfc1a1 100644
--- a/board/freescale/mpc8572ds/ddr.c
+++ b/board/freescale/mpc8572ds/ddr.c
@@ -8,8 +8,8 @@
#include <common.h>
-#include <asm/fsl_ddr_sdram.h>
-#include <asm/fsl_ddr_dimm_params.h>
+#include <fsl_ddr_sdram.h>
+#include <fsl_ddr_dimm_params.h>
struct board_specific_parameters {
    u32 n_ranks;
diff --git a/board/freescale/mpc8572ds/mpc8572ds.c b/board/freescale/mpc8572ds/mpc8572ds.c
index 657df6a..2fb4257 100644
--- a/board/freescale/mpc8572ds/mpc8572ds.c
+++ b/board/freescale/mpc8572ds/mpc8572ds.c
@@ -12,7 +12,7 @@
 #include <asm/cache.h>
 #include <asm/immap_85xx.h>
 #include <asm/fsl_pci.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
 #include <asm/io.h>
 #include <asm/fsl_serdes.h>
 #include <miiphy.h>
diff --git a/board/freescale/mpc8610hpcd/Makefile b/board/freescale/mpc8610hpcd/Makefile
index 933ea17..2613004 100644
--- a/board/freescale/mpc8610hpcd/Makefile
+++ b/board/freescale/mpc8610hpcd/Makefile
@@ -4,6 +4,6 @@
 #
obj-y	+= mpc8610hpcd.o
-obj-$(CONFIG_FSL_DDR2) += ddr.o
+obj-$(CONFIG_SYS_FSL_DDR2) += ddr.o
 obj-y	+= law.o
 obj-$(CONFIG_FSL_DIU_FB)	+= mpc8610hpcd_diu.o
diff --git a/board/freescale/mpc8610hpcd/ddr.c b/board/freescale/mpc8610hpcd/ddr.c
index 6cf9bc1..aa30cab 100644
--- a/board/freescale/mpc8610hpcd/ddr.c
+++ b/board/freescale/mpc8610hpcd/ddr.c
@@ -8,8 +8,8 @@
#include <common.h>
-#include <asm/fsl_ddr_sdram.h>
-#include <asm/fsl_ddr_dimm_params.h>
+#include <fsl_ddr_sdram.h>
+#include <fsl_ddr_dimm_params.h>
void fsl_ddr_board_options(memctl_options_t *popts,
    			dimm_params_t *pdimm,
diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd.c b/board/freescale/mpc8610hpcd/mpc8610hpcd.c
index ffdcf24..aa99623 100644
--- a/board/freescale/mpc8610hpcd/mpc8610hpcd.c
+++ b/board/freescale/mpc8610hpcd/mpc8610hpcd.c
@@ -10,7 +10,7 @@
 #include <asm/processor.h>
 #include <asm/immap_86xx.h>
 #include <asm/fsl_pci.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
 #include <asm/fsl_serdes.h>
 #include <i2c.h>
 #include <asm/io.h>
diff --git a/board/freescale/mpc8641hpcn/Makefile b/board/freescale/mpc8641hpcn/Makefile
index 8d53af8..86c70bc 100644
--- a/board/freescale/mpc8641hpcn/Makefile
+++ b/board/freescale/mpc8641hpcn/Makefile
@@ -7,4 +7,4 @@
obj-y	+= mpc8641hpcn.o
 obj-y	+= law.o
-obj-$(CONFIG_FSL_DDR2) += ddr.o
+obj-$(CONFIG_SYS_FSL_DDR2) += ddr.o
diff --git a/board/freescale/mpc8641hpcn/ddr.c b/board/freescale/mpc8641hpcn/ddr.c
index 651652a..7cd0395 100644
--- a/board/freescale/mpc8641hpcn/ddr.c
+++ b/board/freescale/mpc8641hpcn/ddr.c
@@ -8,8 +8,8 @@
#include <common.h>
-#include <asm/fsl_ddr_sdram.h>
-#include <asm/fsl_ddr_dimm_params.h>
+#include <fsl_ddr_sdram.h>
+#include <fsl_ddr_dimm_params.h>
struct board_specific_parameters {
    u32 n_ranks;
diff --git a/board/freescale/mpc8641hpcn/mpc8641hpcn.c b/board/freescale/mpc8641hpcn/mpc8641hpcn.c
index 46a543e..0cd9df1 100644
--- a/board/freescale/mpc8641hpcn/mpc8641hpcn.c
+++ b/board/freescale/mpc8641hpcn/mpc8641hpcn.c
@@ -9,7 +9,7 @@
 #include <asm/processor.h>
 #include <asm/immap_86xx.h>
 #include <asm/fsl_pci.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
 #include <asm/fsl_serdes.h>
 #include <asm/io.h>
 #include <libfdt.h>
diff --git a/board/freescale/p1010rdb/ddr.c b/board/freescale/p1010rdb/ddr.c
index ab1b41d..b0d95ea 100644
--- a/board/freescale/p1010rdb/ddr.c
+++ b/board/freescale/p1010rdb/ddr.c
@@ -8,8 +8,8 @@
 #include <asm/mmu.h>
 #include <asm/immap_85xx.h>
 #include <asm/processor.h>
-#include <asm/fsl_ddr_sdram.h>
-#include <asm/fsl_ddr_dimm_params.h>
+#include <fsl_ddr_sdram.h>
+#include <fsl_ddr_dimm_params.h>
 #include <asm/io.h>
 #include <asm/fsl_law.h>
diff --git a/board/freescale/p1010rdb/spl_minimal.c b/board/freescale/p1010rdb/spl_minimal.c
index d0e712e..aa2a344 100644
--- a/board/freescale/p1010rdb/spl_minimal.c
+++ b/board/freescale/p1010rdb/spl_minimal.c
@@ -10,7 +10,7 @@
 #include <nand.h>
 #include <asm/mmu.h>
 #include <asm/immap_85xx.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
 #include <asm/fsl_law.h>
 #include <asm/global_data.h>
@@ -19,7 +19,7 @@ DECLARE_GLOBAL_DATA_PTR;
void sdram_init(void)
 {
-	ccsr_ddr_t *ddr = (ccsr_ddr_t *)CONFIG_SYS_MPC8xxx_DDR_ADDR;
+	ccsr_ddr_t *ddr = (ccsr_ddr_t *)CONFIG_SYS_FSL_DDR_ADDR;
    ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
    u32 ddr_ratio;
    unsigned long ddr_freq_mhz;
diff --git a/board/freescale/p1022ds/ddr.c b/board/freescale/p1022ds/ddr.c
index 94d2c2b..09212bc 100644
--- a/board/freescale/p1022ds/ddr.c
+++ b/board/freescale/p1022ds/ddr.c
@@ -8,8 +8,8 @@
#include <common.h>
-#include <asm/fsl_ddr_sdram.h>
-#include <asm/fsl_ddr_dimm_params.h>
+#include <fsl_ddr_sdram.h>
+#include <fsl_ddr_dimm_params.h>
struct board_specific_parameters {
    u32 n_ranks;
diff --git a/board/freescale/p1022ds/p1022ds.c b/board/freescale/p1022ds/p1022ds.c
index 3d1951c..ba789a4 100644
--- a/board/freescale/p1022ds/p1022ds.c
+++ b/board/freescale/p1022ds/p1022ds.c
@@ -14,7 +14,7 @@
 #include <asm/cache.h>
 #include <asm/immap_85xx.h>
 #include <asm/fsl_pci.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
 #include <asm/fsl_serdes.h>
 #include <asm/io.h>
 #include <libfdt.h>
diff --git a/board/freescale/p1022ds/spl_minimal.c b/board/freescale/p1022ds/spl_minimal.c
index 8b34396..6c7e1ac 100644
--- a/board/freescale/p1022ds/spl_minimal.c
+++ b/board/freescale/p1022ds/spl_minimal.c
@@ -9,7 +9,7 @@
 #include <asm/io.h>
 #include <nand.h>
 #include <asm/fsl_law.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
const static u32 sysclk_tbl[] = {
diff --git a/board/freescale/p1023rdb/ddr.c b/board/freescale/p1023rdb/ddr.c
index 9fb61fd..d587df5 100644
--- a/board/freescale/p1023rdb/ddr.c
+++ b/board/freescale/p1023rdb/ddr.c
@@ -8,8 +8,8 @@
 #include <asm/mmu.h>
 #include <asm/immap_85xx.h>
 #include <asm/processor.h>
-#include <asm/fsl_ddr_sdram.h>
-#include <asm/fsl_ddr_dimm_params.h>
+#include <fsl_ddr_sdram.h>
+#include <fsl_ddr_dimm_params.h>
 #include <asm/io.h>
 #include <asm/fsl_law.h>
diff --git a/board/freescale/p1023rdb/p1023rdb.c b/board/freescale/p1023rdb/p1023rdb.c
index b52b092..d2d4f83 100644
--- a/board/freescale/p1023rdb/p1023rdb.c
+++ b/board/freescale/p1023rdb/p1023rdb.c
@@ -16,7 +16,7 @@
 #include <asm/mmu.h>
 #include <asm/immap_85xx.h>
 #include <asm/fsl_pci.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
 #include <asm/fsl_portals.h>
 #include <libfdt.h>
 #include <fdt_support.h>
diff --git a/board/freescale/p1023rds/p1023rds.c b/board/freescale/p1023rds/p1023rds.c
index 7c54b65..2cfcdc4 100644
--- a/board/freescale/p1023rds/p1023rds.c
+++ b/board/freescale/p1023rds/p1023rds.c
@@ -16,7 +16,7 @@
 #include <asm/mmu.h>
 #include <asm/immap_85xx.h>
 #include <asm/fsl_pci.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
 #include <asm/fsl_portals.h>
 #include <libfdt.h>
 #include <fdt_support.h>
@@ -58,7 +58,7 @@ int checkboard(void)
 phys_size_t fixed_sdram(void)
 {
 #ifndef CONFIG_SYS_RAMBOOT
-	ccsr_ddr_t *ddr = (ccsr_ddr_t *)CONFIG_SYS_MPC8xxx_DDR_ADDR;
+	ccsr_ddr_t *ddr = (ccsr_ddr_t *)CONFIG_SYS_FSL_DDR_ADDR;
set_next_law(0, LAW_SIZE_2G, LAW_TRGT_IF_DDR_1);
diff --git a/board/freescale/p1_p2_rdb/ddr.c b/board/freescale/p1_p2_rdb/ddr.c
index 5bee22e..17d3bea 100644
--- a/board/freescale/p1_p2_rdb/ddr.c
+++ b/board/freescale/p1_p2_rdb/ddr.c
@@ -8,7 +8,7 @@
 #include <asm/mmu.h>
 #include <asm/immap_85xx.h>
 #include <asm/processor.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
 #include <asm/io.h>
 #include <asm/fsl_law.h>
diff --git a/board/freescale/p1_p2_rdb_pc/ddr.c b/board/freescale/p1_p2_rdb_pc/ddr.c
index 81cc093..946d503 100644
--- a/board/freescale/p1_p2_rdb_pc/ddr.c
+++ b/board/freescale/p1_p2_rdb_pc/ddr.c
@@ -10,8 +10,8 @@
 #include <asm/mmu.h>
 #include <asm/immap_85xx.h>
 #include <asm/processor.h>
-#include <asm/fsl_ddr_sdram.h>
-#include <asm/fsl_ddr_dimm_params.h>
+#include <fsl_ddr_sdram.h>
+#include <fsl_ddr_dimm_params.h>
 #include <asm/io.h>
 #include <asm/fsl_law.h>
diff --git a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
index 50553da..966abb2 100644
--- a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
+++ b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
@@ -14,7 +14,7 @@
 #include <asm/cache.h>
 #include <asm/immap_85xx.h>
 #include <asm/fsl_pci.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
 #include <asm/io.h>
 #include <asm/fsl_law.h>
 #include <asm/fsl_lbc.h>
diff --git a/board/freescale/p1_p2_rdb_pc/spl_minimal.c b/board/freescale/p1_p2_rdb_pc/spl_minimal.c
index adfa7b1..92437bc 100644
--- a/board/freescale/p1_p2_rdb_pc/spl_minimal.c
+++ b/board/freescale/p1_p2_rdb_pc/spl_minimal.c
@@ -10,7 +10,7 @@
 #include <nand.h>
 #include <linux/compiler.h>
 #include <asm/fsl_law.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
 #include <asm/global_data.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/freescale/p1_twr/ddr.c b/board/freescale/p1_twr/ddr.c
index 67f69d7..a2ce75a 100644
--- a/board/freescale/p1_twr/ddr.c
+++ b/board/freescale/p1_twr/ddr.c
@@ -8,8 +8,8 @@
 #include <asm/mmu.h>
 #include <asm/immap_85xx.h>
 #include <asm/processor.h>
-#include <asm/fsl_ddr_sdram.h>
-#include <asm/fsl_ddr_dimm_params.h>
+#include <fsl_ddr_sdram.h>
+#include <fsl_ddr_dimm_params.h>
 #include <asm/io.h>
 #include <asm/fsl_law.h>
diff --git a/board/freescale/p1_twr/p1_twr.c b/board/freescale/p1_twr/p1_twr.c
index ea8db6f..0e0d058 100644
--- a/board/freescale/p1_twr/p1_twr.c
+++ b/board/freescale/p1_twr/p1_twr.c
@@ -14,7 +14,7 @@
 #include <asm/cache.h>
 #include <asm/immap_85xx.h>
 #include <asm/fsl_pci.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
 #include <asm/io.h>
 #include <asm/fsl_law.h>
 #include <asm/fsl_lbc.h>
diff --git a/board/freescale/p2020come/ddr.c b/board/freescale/p2020come/ddr.c
index da80477..b642e12 100644
--- a/board/freescale/p2020come/ddr.c
+++ b/board/freescale/p2020come/ddr.c
@@ -5,8 +5,8 @@
  */
 #include <common.h>
-#include <asm/fsl_ddr_sdram.h>
-#include <asm/fsl_ddr_dimm_params.h>
+#include <fsl_ddr_sdram.h>
+#include <fsl_ddr_dimm_params.h>
void fsl_ddr_board_options(memctl_options_t *popts,
    			dimm_params_t *pdimm,
diff --git a/board/freescale/p2020ds/ddr.c b/board/freescale/p2020ds/ddr.c
index b12141f..debe70b 100644
--- a/board/freescale/p2020ds/ddr.c
+++ b/board/freescale/p2020ds/ddr.c
@@ -8,8 +8,8 @@
#include <common.h>
-#include <asm/fsl_ddr_sdram.h>
-#include <asm/fsl_ddr_dimm_params.h>
+#include <fsl_ddr_sdram.h>
+#include <fsl_ddr_dimm_params.h>
struct board_specific_parameters {
    u32 n_ranks;
@@ -37,7 +37,7 @@ static const struct board_specific_parameters dimm0[] = {
     *   num|  hi|  clk| cpo|wrdata|2T
     * ranks| mhz|adjst|    | delay|
     */
-#ifdef CONFIG_FSL_DDR2
+#ifdef CONFIG_SYS_FSL_DDR2
    {2,  549,    4,   0x1f,    2,  0},
    {2,  680,    4,   0x1f,    3,  0},
    {2,  850,    4,   0x1f,    4,  0},
diff --git a/board/freescale/p2020ds/p2020ds.c b/board/freescale/p2020ds/p2020ds.c
index 58a4223..dd8c6b1 100644
--- a/board/freescale/p2020ds/p2020ds.c
+++ b/board/freescale/p2020ds/p2020ds.c
@@ -12,7 +12,7 @@
 #include <asm/cache.h>
 #include <asm/immap_85xx.h>
 #include <asm/fsl_pci.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
 #include <asm/io.h>
 #include <asm/fsl_serdes.h>
 #include <miiphy.h>
@@ -68,7 +68,7 @@ int checkboard(void)
phys_size_t fixed_sdram(void)
 {
-	volatile ccsr_ddr_t *ddr = (ccsr_ddr_t *)CONFIG_SYS_MPC8xxx_DDR_ADDR;
+	volatile ccsr_ddr_t *ddr = (ccsr_ddr_t *)CONFIG_SYS_FSL_DDR_ADDR;
    uint d_init;
ddr->cs0_config = CONFIG_SYS_DDR_CS0_CONFIG;
diff --git a/board/freescale/p2041rdb/ddr.c b/board/freescale/p2041rdb/ddr.c
index cc1bfae..b8bbcdf 100644
--- a/board/freescale/p2041rdb/ddr.c
+++ b/board/freescale/p2041rdb/ddr.c
@@ -10,8 +10,8 @@
 #include <i2c.h>
 #include <hwconfig.h>
 #include <asm/mmu.h>
-#include <asm/fsl_ddr_sdram.h>
-#include <asm/fsl_ddr_dimm_params.h>
+#include <fsl_ddr_sdram.h>
+#include <fsl_ddr_dimm_params.h>
 #include <asm/fsl_law.h>
struct board_specific_parameters {
diff --git a/board/freescale/t1040qds/ddr.c b/board/freescale/t1040qds/ddr.c
index 4fd17da..da89a36 100644
--- a/board/freescale/t1040qds/ddr.c
+++ b/board/freescale/t1040qds/ddr.c
@@ -8,8 +8,8 @@
 #include <i2c.h>
 #include <hwconfig.h>
 #include <asm/mmu.h>
-#include <asm/fsl_ddr_sdram.h>
-#include <asm/fsl_ddr_dimm_params.h>
+#include <fsl_ddr_sdram.h>
+#include <fsl_ddr_dimm_params.h>
 #include <asm/fsl_law.h>
 #include "ddr.h"
diff --git a/board/freescale/t104xrdb/ddr.c b/board/freescale/t104xrdb/ddr.c
index 8f58dd6..9009afa 100644
--- a/board/freescale/t104xrdb/ddr.c
+++ b/board/freescale/t104xrdb/ddr.c
@@ -8,8 +8,8 @@
 #include <i2c.h>
 #include <hwconfig.h>
 #include <asm/mmu.h>
-#include <asm/fsl_ddr_sdram.h>
-#include <asm/fsl_ddr_dimm_params.h>
+#include <fsl_ddr_sdram.h>
+#include <fsl_ddr_dimm_params.h>
 #include <asm/fsl_law.h>
 #include "ddr.h"
diff --git a/board/freescale/t4qds/ddr.c b/board/freescale/t4qds/ddr.c
index d70c310..7586cc3 100644
--- a/board/freescale/t4qds/ddr.c
+++ b/board/freescale/t4qds/ddr.c
@@ -10,8 +10,8 @@
 #include <i2c.h>
 #include <hwconfig.h>
 #include <asm/mmu.h>
-#include <asm/fsl_ddr_sdram.h>
-#include <asm/fsl_ddr_dimm_params.h>
+#include <fsl_ddr_sdram.h>
+#include <fsl_ddr_dimm_params.h>
 #include <asm/fsl_law.h>
 #include "ddr.h"
diff --git a/board/freescale/t4qds/eth.c b/board/freescale/t4qds/eth.c
index b5f488b..24cf907 100644
--- a/board/freescale/t4qds/eth.c
+++ b/board/freescale/t4qds/eth.c
@@ -12,7 +12,7 @@
 #include <asm/cache.h>
 #include <asm/immap_85xx.h>
 #include <asm/fsl_law.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
 #include <asm/fsl_serdes.h>
 #include <asm/fsl_portals.h>
 #include <asm/fsl_liodn.h>
diff --git a/board/gdsys/p1022/controlcenterd.c b/board/gdsys/p1022/controlcenterd.c
index 81c22bc..8ccd9ce 100644
--- a/board/gdsys/p1022/controlcenterd.c
+++ b/board/gdsys/p1022/controlcenterd.c
@@ -29,7 +29,7 @@
 #include <asm/cache.h>
 #include <asm/immap_85xx.h>
 #include <asm/fsl_pci.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
 #include <asm/fsl_serdes.h>
 #include <asm/io.h>
 #include <libfdt.h>
diff --git a/board/gdsys/p1022/ddr.c b/board/gdsys/p1022/ddr.c
index 4a652de..7596736 100644
--- a/board/gdsys/p1022/ddr.c
+++ b/board/gdsys/p1022/ddr.c
@@ -12,8 +12,8 @@
 #include <common.h>
 #include <i2c.h>
-#include <asm/fsl_ddr_sdram.h>
-#include <asm/fsl_ddr_dimm_params.h>
+#include <fsl_ddr_sdram.h>
+#include <fsl_ddr_dimm_params.h>
void fsl_ddr_board_options(memctl_options_t *popts, dimm_params_t *pdimm,
    		   unsigned int ctrl_num)
diff --git a/board/keymile/kmp204x/ddr.c b/board/keymile/kmp204x/ddr.c
index bd425aa..34ac697 100644
--- a/board/keymile/kmp204x/ddr.c
+++ b/board/keymile/kmp204x/ddr.c
@@ -11,8 +11,8 @@
 #include <i2c.h>
 #include <hwconfig.h>
 #include <asm/mmu.h>
-#include <asm/fsl_ddr_sdram.h>
-#include <asm/fsl_ddr_dimm_params.h>
+#include <fsl_ddr_sdram.h>
+#include <fsl_ddr_dimm_params.h>
void fsl_ddr_board_options(memctl_options_t *popts,
    			dimm_params_t *pdimm,
diff --git a/board/sbc8548/Makefile b/board/sbc8548/Makefile
index b1e32a6..4c9b6cd 100644
--- a/board/sbc8548/Makefile
+++ b/board/sbc8548/Makefile
@@ -11,4 +11,4 @@
 obj-y	+= sbc8548.o
 obj-y	+= law.o
 obj-y	+= tlb.o
-obj-$(CONFIG_FSL_DDR2) += ddr.o
+obj-$(CONFIG_SYS_FSL_DDR2) += ddr.o
diff --git a/board/sbc8548/ddr.c b/board/sbc8548/ddr.c
index 9508561..8817103 100644
--- a/board/sbc8548/ddr.c
+++ b/board/sbc8548/ddr.c
@@ -9,8 +9,8 @@
 #include <common.h>
 #include <i2c.h>
-#include <asm/fsl_ddr_sdram.h>
-#include <asm/fsl_ddr_dimm_params.h>
+#include <fsl_ddr_sdram.h>
+#include <fsl_ddr_dimm_params.h>
void fsl_ddr_board_options(memctl_options_t *popts,
    			dimm_params_t *pdimm,
@@ -91,7 +91,7 @@ void get_spd(generic_spd_eeprom_t *spd, u8 i2c_address)
  */
 phys_size_t fixed_sdram(void)
 {
-	volatile ccsr_ddr_t *ddr = (void *)(CONFIG_SYS_MPC8xxx_DDR_ADDR);
+	volatile ccsr_ddr_t *ddr = (void *)(CONFIG_SYS_FSL_DDR_ADDR);
out_be32(&ddr->cs0_bnds,	0x0000007f);
    out_be32(&ddr->cs1_bnds,	0x008000ff);
diff --git a/board/sbc8548/sbc8548.c b/board/sbc8548/sbc8548.c
index 3cd945f..d584276 100644
--- a/board/sbc8548/sbc8548.c
+++ b/board/sbc8548/sbc8548.c
@@ -15,7 +15,7 @@
 #include <asm/processor.h>
 #include <asm/immap_85xx.h>
 #include <asm/fsl_pci.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
 #include <asm/fsl_serdes.h>
 #include <spd_sdram.h>
 #include <netdev.h>
diff --git a/board/sbc8641d/Makefile b/board/sbc8641d/Makefile
index 9626b06..a9b2026 100644
--- a/board/sbc8641d/Makefile
+++ b/board/sbc8641d/Makefile
@@ -7,4 +7,4 @@
obj-y	+= sbc8641d.o
 obj-y	+= law.o
-obj-$(CONFIG_FSL_DDR2) += ddr.o
+obj-$(CONFIG_SYS_FSL_DDR2) += ddr.o
diff --git a/board/sbc8641d/ddr.c b/board/sbc8641d/ddr.c
index 996ffe2..b31ea34 100644
--- a/board/sbc8641d/ddr.c
+++ b/board/sbc8641d/ddr.c
@@ -8,8 +8,8 @@
#include <common.h>
-#include <asm/fsl_ddr_sdram.h>
-#include <asm/fsl_ddr_dimm_params.h>
+#include <fsl_ddr_sdram.h>
+#include <fsl_ddr_dimm_params.h>
void fsl_ddr_board_options(memctl_options_t *popts,
    			dimm_params_t *pdimm,
diff --git a/board/sbc8641d/sbc8641d.c b/board/sbc8641d/sbc8641d.c
index 0b5e8dc..8160c7b 100644
--- a/board/sbc8641d/sbc8641d.c
+++ b/board/sbc8641d/sbc8641d.c
@@ -18,7 +18,7 @@
 #include <asm/processor.h>
 #include <asm/immap_86xx.h>
 #include <asm/fsl_pci.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
 #include <asm/fsl_serdes.h>
 #include <libfdt.h>
 #include <fdt_support.h>
diff --git a/board/socrates/Makefile b/board/socrates/Makefile
index 0a08810..79bda71 100644
--- a/board/socrates/Makefile
+++ b/board/socrates/Makefile
@@ -12,4 +12,4 @@ obj-y	+= law.o
 obj-y	+= tlb.o
 obj-y	+= nand.o
 obj-y	+= sdram.o
-obj-$(CONFIG_FSL_DDR2) += ddr.o
+obj-$(CONFIG_SYS_FSL_DDR2) += ddr.o
diff --git a/board/socrates/ddr.c b/board/socrates/ddr.c
index e9db476..6bad4da 100644
--- a/board/socrates/ddr.c
+++ b/board/socrates/ddr.c
@@ -8,8 +8,8 @@
#include <common.h>
-#include <asm/fsl_ddr_sdram.h>
-#include <asm/fsl_ddr_dimm_params.h>
+#include <fsl_ddr_sdram.h>
+#include <fsl_ddr_dimm_params.h>
void fsl_ddr_board_options(memctl_options_t *popts,
    			dimm_params_t *pdimm,
diff --git a/board/socrates/sdram.c b/board/socrates/sdram.c
index 313efae..356e8e8 100644
--- a/board/socrates/sdram.c
+++ b/board/socrates/sdram.c
@@ -8,7 +8,7 @@
 #include <common.h>
 #include <asm/processor.h>
 #include <asm/immap_85xx.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
 #include <asm/processor.h>
 #include <asm/mmu.h>
 #include <spd_sdram.h>
@@ -24,7 +24,7 @@
  */
 phys_size_t fixed_sdram(void)
 {
-	volatile ccsr_ddr_t *ddr = (void *)(CONFIG_SYS_MPC8xxx_DDR_ADDR);
+	volatile ccsr_ddr_t *ddr = (void *)(CONFIG_SYS_FSL_DDR_ADDR);
/*
     * Disable memory controller.
diff --git a/board/stx/stxgp3/Makefile b/board/stx/stxgp3/Makefile
index 9b72434..78e2d6c 100644
--- a/board/stx/stxgp3/Makefile
+++ b/board/stx/stxgp3/Makefile
@@ -9,4 +9,4 @@ obj-y	+= stxgp3.o
 obj-y	+= law.o
 obj-y	+= tlb.o
 obj-y	+= flash.o
-obj-$(CONFIG_FSL_DDR1) += ddr.o
+obj-$(CONFIG_SYS_FSL_DDR1) += ddr.o
diff --git a/board/stx/stxgp3/ddr.c b/board/stx/stxgp3/ddr.c
index 9e79815..41d4cfe 100644
--- a/board/stx/stxgp3/ddr.c
+++ b/board/stx/stxgp3/ddr.c
@@ -8,8 +8,8 @@
#include <common.h>
-#include <asm/fsl_ddr_sdram.h>
-#include <asm/fsl_ddr_dimm_params.h>
+#include <fsl_ddr_sdram.h>
+#include <fsl_ddr_dimm_params.h>
void fsl_ddr_board_options(memctl_options_t *popts,
    			dimm_params_t *pdimm,
diff --git a/board/stx/stxgp3/stxgp3.c b/board/stx/stxgp3/stxgp3.c
index bd683f6..c80d525 100644
--- a/board/stx/stxgp3/stxgp3.c
+++ b/board/stx/stxgp3/stxgp3.c
@@ -18,7 +18,7 @@
 #include <asm/processor.h>
 #include <asm/mmu.h>
 #include <asm/immap_85xx.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
 #include <ioports.h>
 #include <asm/io.h>
 #include <spd_sdram.h>
diff --git a/board/stx/stxssa/Makefile b/board/stx/stxssa/Makefile
index 17e0aae..b1d4b0a 100644
--- a/board/stx/stxssa/Makefile
+++ b/board/stx/stxssa/Makefile
@@ -8,4 +8,4 @@
 obj-y	+= stxssa.o
 obj-y	+= law.o
 obj-y	+= tlb.o
-obj-$(CONFIG_FSL_DDR1) += ddr.o
+obj-$(CONFIG_SYS_FSL_DDR1) += ddr.o
diff --git a/board/stx/stxssa/ddr.c b/board/stx/stxssa/ddr.c
index 71be3bf..1ccd4c5 100644
--- a/board/stx/stxssa/ddr.c
+++ b/board/stx/stxssa/ddr.c
@@ -9,8 +9,8 @@
 #include <common.h>
 #include <i2c.h>
-#include <asm/fsl_ddr_sdram.h>
-#include <asm/fsl_ddr_dimm_params.h>
+#include <fsl_ddr_sdram.h>
+#include <fsl_ddr_dimm_params.h>
void fsl_ddr_board_options(memctl_options_t *popts,
    			dimm_params_t *pdimm,
diff --git a/board/stx/stxssa/stxssa.c b/board/stx/stxssa/stxssa.c
index c08a18b..f5c3d75 100644
--- a/board/stx/stxssa/stxssa.c
+++ b/board/stx/stxssa/stxssa.c
@@ -19,7 +19,7 @@
 #include <asm/mmu.h>
 #include <asm/immap_85xx.h>
 #include <asm/fsl_pci.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
 #include <ioports.h>
 #include <asm/io.h>
 #include <spd_sdram.h>
diff --git a/board/xes/xpedite517x/ddr.c b/board/xes/xpedite517x/ddr.c
index f48c02f..fd602ea 100644
--- a/board/xes/xpedite517x/ddr.c
+++ b/board/xes/xpedite517x/ddr.c
@@ -7,8 +7,8 @@
#include <common.h>
 #include <i2c.h>
-#include <asm/fsl_ddr_sdram.h>
-#include <asm/fsl_ddr_dimm_params.h>
+#include <fsl_ddr_sdram.h>
+#include <fsl_ddr_dimm_params.h>
void get_spd(ddr2_spd_eeprom_t *spd, u8 i2c_address)
 {
diff --git a/board/xes/xpedite517x/xpedite517x.c b/board/xes/xpedite517x/xpedite517x.c
index 1782042..b7ad349 100644
--- a/board/xes/xpedite517x/xpedite517x.c
+++ b/board/xes/xpedite517x/xpedite517x.c
@@ -6,7 +6,7 @@
#include <common.h>
 #include <asm/processor.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
 #include <asm/mmu.h>
 #include <asm/io.h>
 #include <fdt_support.h>
diff --git a/board/xes/xpedite520x/ddr.c b/board/xes/xpedite520x/ddr.c
index 3671cb8..5c5eadc 100644
--- a/board/xes/xpedite520x/ddr.c
+++ b/board/xes/xpedite520x/ddr.c
@@ -9,8 +9,8 @@
 #include <common.h>
 #include <i2c.h>
-#include <asm/fsl_ddr_sdram.h>
-#include <asm/fsl_ddr_dimm_params.h>
+#include <fsl_ddr_sdram.h>
+#include <fsl_ddr_dimm_params.h>
void get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
 {
diff --git a/board/xes/xpedite537x/ddr.c b/board/xes/xpedite537x/ddr.c
index f41ae73..56b5a18 100644
--- a/board/xes/xpedite537x/ddr.c
+++ b/board/xes/xpedite537x/ddr.c
@@ -8,8 +8,8 @@
 #include <common.h>
 #include <i2c.h>
-#include <asm/fsl_ddr_sdram.h>
-#include <asm/fsl_ddr_dimm_params.h>
+#include <fsl_ddr_sdram.h>
+#include <fsl_ddr_dimm_params.h>
void get_spd(ddr2_spd_eeprom_t *spd, u8 i2c_address)
 {
diff --git a/board/xes/xpedite550x/ddr.c b/board/xes/xpedite550x/ddr.c
index 9fc6f04..0c0605e 100644
--- a/board/xes/xpedite550x/ddr.c
+++ b/board/xes/xpedite550x/ddr.c
@@ -8,8 +8,8 @@
 #include <common.h>
 #include <i2c.h>
-#include <asm/fsl_ddr_sdram.h>
-#include <asm/fsl_ddr_dimm_params.h>
+#include <fsl_ddr_sdram.h>
+#include <fsl_ddr_dimm_params.h>
void get_spd(ddr3_spd_eeprom_t *spd, u8 i2c_address)
 {
diff --git a/drivers/ddr/fsl/Makefile b/drivers/ddr/fsl/Makefile
new file mode 100644
index 0000000..a328b43
--- /dev/null
+++ b/drivers/ddr/fsl/Makefile
@@ -0,0 +1,34 @@
+#
+# Copyright 2008-2011 Freescale Semiconductor, Inc.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# Version 2 as published by the Free Software Foundation.
+#
+
+obj-$(CONFIG_SYS_FSL_DDR1)	+= main.o util.o ctrl_regs.o options.o \
+				   lc_common_dimm_params.o
+
+obj-$(CONFIG_SYS_FSL_DDR2)	+= main.o util.o ctrl_regs.o options.o \
+				   lc_common_dimm_params.o
+
+obj-$(CONFIG_SYS_FSL_DDR3)	+= main.o util.o ctrl_regs.o options.o \
+				   lc_common_dimm_params.o
+ifdef CONFIG_DDR_SPD
+SPD := y
+endif
+ifdef CONFIG_SPD_EEPROM
+SPD := y
+endif
+ifdef SPD
+obj-$(CONFIG_SYS_FSL_DDR1)	+= ddr1_dimm_params.o
+obj-$(CONFIG_SYS_FSL_DDR2)	+= ddr2_dimm_params.o
+obj-$(CONFIG_SYS_FSL_DDR3)	+= ddr3_dimm_params.o
+endif
+
+obj-$(CONFIG_FSL_DDR_INTERACTIVE)	+= interactive.o
+obj-$(CONFIG_SYS_FSL_DDRC_GEN1)	+= mpc85xx_ddr_gen1.o
+obj-$(CONFIG_SYS_FSL_DDRC_GEN2)	+= mpc85xx_ddr_gen2.o
+obj-$(CONFIG_SYS_FSL_DDRC_GEN3)	+= mpc85xx_ddr_gen3.o
+obj-$(CONFIG_SYS_FSL_DDR_86XX)		+= mpc86xx_ddr.o
+obj-$(CONFIG_FSL_DDR_INTERACTIVE)	+= interactive.o
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c b/drivers/ddr/fsl/ctrl_regs.c
similarity index 97%
rename from arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c
rename to drivers/ddr/fsl/ctrl_regs.c
index dcfc48a..aed4569 100644
--- a/arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c
+++ b/drivers/ddr/fsl/ctrl_regs.c
@@ -11,11 +11,12 @@
  */
#include <common.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
-#include "ddr.h"
+#include <fsl_ddr.h>
+#include <asm/io.h>
-#define _DDR_ADDR CONFIG_SYS_MPC8xxx_DDR_ADDR
+#define _DDR_ADDR CONFIG_SYS_FSL_DDR_ADDR
static u32 fsl_ddr_get_version(void)
 {
@@ -68,9 +69,9 @@ static inline int fsl_ddr_get_rtt(void)
 {
    int rtt;
-#if defined(CONFIG_FSL_DDR1)
+#if defined(CONFIG_SYS_FSL_DDR1)
    rtt = 0;
-#elif defined(CONFIG_FSL_DDR2)
+#elif defined(CONFIG_SYS_FSL_DDR2)
    rtt = 3;
 #else
    rtt = 0;
@@ -217,7 +218,7 @@ static void set_csn_config_2(int i, fsl_ddr_cfg_regs_t *ddr)
/* -3E = 667 CL5, -25 = CL6 800, -25E = CL5 800 */
-#if !defined(CONFIG_FSL_DDR1)
+#if !defined(CONFIG_SYS_FSL_DDR1)
 static inline int avoid_odt_overlap(const dimm_params_t *dimm_params)
 {
 #if CONFIG_DIMM_SLOTS_PER_CTLR == 1
@@ -263,7 +264,7 @@ static void set_timing_cfg_0(fsl_ddr_cfg_regs_t *ddr,
    /* Mode register set cycle time (tMRD). */
    unsigned char tmrd_mclk;
-#ifdef CONFIG_FSL_DDR3
+#ifdef CONFIG_SYS_FSL_DDR3
    /*
     * (tXARD and tXARDS). Empirical?
     * The DDR3 spec has not tXARD,
@@ -302,7 +303,7 @@ static void set_timing_cfg_0(fsl_ddr_cfg_regs_t *ddr,
    	pre_pd_exit_mclk = act_pd_exit_mclk;
    	taxpd_mclk = 1;
    }
-#else /* CONFIG_FSL_DDR2 */
+#else /* CONFIG_SYS_FSL_DDR2 */
    /*
     * (tXARD and tXARDS). Empirical?
     * tXARD = 2 for DDR2
@@ -330,7 +331,7 @@ static void set_timing_cfg_0(fsl_ddr_cfg_regs_t *ddr,
    	);
    debug("FSLDDR: timing_cfg_0 = 0x%08x\n", ddr->timing_cfg_0);
 }
-#endif	/* defined(CONFIG_FSL_DDR2) */
+#endif	/* defined(CONFIG_SYS_FSL_DDR2) */
/* DDR SDRAM Timing Configuration 3 (TIMING_CFG_3) */
 static void set_timing_cfg_3(fsl_ddr_cfg_regs_t *ddr,
@@ -420,9 +421,9 @@ static void set_timing_cfg_1(fsl_ddr_cfg_regs_t *ddr,
     *      4.5                     1000
     *      5.0             5       1001
     */
-#if defined(CONFIG_FSL_DDR1)
+#if defined(CONFIG_SYS_FSL_DDR1)
    caslat_ctrl = (cas_latency + 1) & 0x07;
-#elif defined(CONFIG_FSL_DDR2)
+#elif defined(CONFIG_SYS_FSL_DDR2)
    caslat_ctrl = 2 * cas_latency - 1;
 #else
    /*
@@ -447,7 +448,7 @@ static void set_timing_cfg_1(fsl_ddr_cfg_regs_t *ddr,
    /*
     * JEDEC has min requirement for tRRD
     */
-#if defined(CONFIG_FSL_DDR3)
+#if defined(CONFIG_SYS_FSL_DDR3)
    if (acttoact_mclk < 4)
    	acttoact_mclk = 4;
 #endif
@@ -455,10 +456,10 @@ static void set_timing_cfg_1(fsl_ddr_cfg_regs_t *ddr,
    /*
     * JEDEC has some min requirements for tWTR
     */
-#if defined(CONFIG_FSL_DDR2)
+#if defined(CONFIG_SYS_FSL_DDR2)
    if (wrtord_mclk < 2)
    	wrtord_mclk = 2;
-#elif defined(CONFIG_FSL_DDR3)
+#elif defined(CONFIG_SYS_FSL_DDR3)
    if (wrtord_mclk < 4)
    	wrtord_mclk = 4;
 #endif
@@ -504,7 +505,7 @@ static void set_timing_cfg_2(fsl_ddr_cfg_regs_t *ddr,
    add_lat_mclk = additive_latency;
    cpo = popts->cpo_override;
-#if defined(CONFIG_FSL_DDR1)
+#if defined(CONFIG_SYS_FSL_DDR1)
    /*
     * This is a lie.  It should really be 1, but if it is
     * set to 1, bits overlap into the old controller's
@@ -512,7 +513,7 @@ static void set_timing_cfg_2(fsl_ddr_cfg_regs_t *ddr,
     * the HW will magically treat it as 1 for DDR 1.  Oh Yea.
     */
    wr_lat = 0;
-#elif defined(CONFIG_FSL_DDR2)
+#elif defined(CONFIG_SYS_FSL_DDR2)
    wr_lat = cas_latency - 1;
 #else
    wr_lat = compute_cas_write_latency();
@@ -522,10 +523,10 @@ static void set_timing_cfg_2(fsl_ddr_cfg_regs_t *ddr,
    /*
     * JEDEC has some min requirements for tRTP
     */
-#if defined(CONFIG_FSL_DDR2)
+#if defined(CONFIG_SYS_FSL_DDR2)
    if (rd_to_pre  < 2)
    	rd_to_pre  = 2;
-#elif defined(CONFIG_FSL_DDR3)
+#elif defined(CONFIG_SYS_FSL_DDR3)
    if (rd_to_pre < 4)
    	rd_to_pre = 4;
 #endif
@@ -709,7 +710,7 @@ static void set_ddr_sdram_cfg_2(fsl_ddr_cfg_regs_t *ddr,
     *        * ({EXT_REFREC || REFREC} + 8 + 2)]}
     *      << DDR_SDRAM_INTERVAL[REFINT]
     */
-#if defined(CONFIG_FSL_DDR3)
+#if defined(CONFIG_SYS_FSL_DDR3)
    obc_cfg = popts->otf_burst_chop_en;
 #else
    obc_cfg = 0;
@@ -738,7 +739,7 @@ static void set_ddr_sdram_cfg_2(fsl_ddr_cfg_regs_t *ddr,
    d_init = 0;
 #endif
-#if defined(CONFIG_FSL_DDR3)
+#if defined(CONFIG_SYS_FSL_DDR3)
    md_en = popts->mirrored_dimm;
 #endif
    qd_en = popts->quad_rank_present ? 1 : 0;
@@ -771,7 +772,7 @@ static void set_ddr_sdram_mode_2(fsl_ddr_cfg_regs_t *ddr,
    unsigned short esdmode2 = 0;	/* Extended SDRAM mode 2 */
    unsigned short esdmode3 = 0;	/* Extended SDRAM mode 3 */
-#if defined(CONFIG_FSL_DDR3)
+#if defined(CONFIG_SYS_FSL_DDR3)
    int i;
    unsigned int rtt_wr = 0;	/* Rtt_WR - dynamic ODT off */
    unsigned int srt = 0;	/* self-refresh temerature, normal range */
@@ -800,7 +801,7 @@ static void set_ddr_sdram_mode_2(fsl_ddr_cfg_regs_t *ddr,
    			 );
    debug("FSLDDR: ddr_sdram_mode_2 = 0x%08x\n", ddr->ddr_sdram_mode_2);
-#ifdef CONFIG_FSL_DDR3
+#ifdef CONFIG_SYS_FSL_DDR3
    if (unq_mrs_en) {	/* unique mode registers are supported */
    	for (i = 1; i < CONFIG_CHIP_SELECTS_PER_CTRL; i++) {
    		if (popts->rtt_override)
@@ -861,7 +862,7 @@ static void set_ddr_sdram_interval(fsl_ddr_cfg_regs_t *ddr,
    debug("FSLDDR: ddr_sdram_interval = 0x%08x\n", ddr->ddr_sdram_interval);
 }
-#if defined(CONFIG_FSL_DDR3)
+#if defined(CONFIG_SYS_FSL_DDR3)
 /* DDR SDRAM Mode configuration set (DDR_SDRAM_MODE) */
 static void set_ddr_sdram_mode(fsl_ddr_cfg_regs_t *ddr,
    		       const memctl_options_t *popts,
@@ -1057,7 +1058,7 @@ static void set_ddr_sdram_mode(fsl_ddr_cfg_regs_t *ddr,
    }
 }
-#else /* !CONFIG_FSL_DDR3 */
+#else /* !CONFIG_SYS_FSL_DDR3 */
/* DDR SDRAM Mode configuration set (DDR_SDRAM_MODE) */
 static void set_ddr_sdram_mode(fsl_ddr_cfg_regs_t *ddr,
@@ -1103,7 +1104,7 @@ static void set_ddr_sdram_mode(fsl_ddr_cfg_regs_t *ddr,
    unsigned int bt;
    unsigned int bl;	/* BL: Burst Length */
-#if defined(CONFIG_FSL_DDR2)
+#if defined(CONFIG_SYS_FSL_DDR2)
    const unsigned int mclk_ps = get_memory_clk_period_ps();
 #endif
    dqs_en = !popts->dqs_config;
@@ -1132,15 +1133,15 @@ static void set_ddr_sdram_mode(fsl_ddr_cfg_regs_t *ddr,
     */
    pd = 0;
-#if defined(CONFIG_FSL_DDR1)
+#if defined(CONFIG_SYS_FSL_DDR1)
    wr = 0;       /* Historical */
-#elif defined(CONFIG_FSL_DDR2)
+#elif defined(CONFIG_SYS_FSL_DDR2)
    wr = (common_dimm->twr_ps + mclk_ps - 1) / mclk_ps - 1;
 #endif
    dll_res = 0;
    mode = 0;
-#if defined(CONFIG_FSL_DDR1)
+#if defined(CONFIG_SYS_FSL_DDR1)
    if (1 <= cas_latency && cas_latency <= 4) {
    	unsigned char mode_caslat_table[4] = {
    		0x5,	/* 1.5 clocks */
@@ -1152,7 +1153,7 @@ static void set_ddr_sdram_mode(fsl_ddr_cfg_regs_t *ddr,
    } else {
    	printf("Warning: unknown cas_latency %d\n", cas_latency);
    }
-#elif defined(CONFIG_FSL_DDR2)
+#elif defined(CONFIG_SYS_FSL_DDR2)
    caslat = cas_latency;
 #endif
    bt = 0;
@@ -1249,7 +1250,7 @@ static void set_timing_cfg_4(fsl_ddr_cfg_regs_t *ddr,
    unsigned int wwt = 0; /* Write-to-write turnaround for same CS */
    unsigned int dll_lock = 0; /* DDR SDRAM DLL Lock Time */
-#if defined(CONFIG_FSL_DDR3)
+#if defined(CONFIG_SYS_FSL_DDR3)
    if (popts->burst_length == DDR_BL8) {
    	/* We set BL/2 for fixed BL8 */
    	rrt = 0;	/* BL/2 clocks */
@@ -1279,7 +1280,7 @@ static void set_timing_cfg_5(fsl_ddr_cfg_regs_t *ddr, unsigned int cas_latency)
    unsigned int wodt_on = 0;	/* Write to ODT on */
    unsigned int wodt_off = 0;	/* Write to ODT off */
-#if defined(CONFIG_FSL_DDR3)
+#if defined(CONFIG_SYS_FSL_DDR3)
    /* rodt_on = timing_cfg_1[caslat] - timing_cfg_2[wrlat] + 1 */
    rodt_on = cas_latency - ((ddr->timing_cfg_2 & 0x00780000) >> 19) + 1;
    rodt_off = 4;	/*  4 clocks */
@@ -1612,7 +1613,7 @@ compute_fsl_memctl_config_regs(const memctl_options_t *popts,
set_ddr_eor(ddr, popts);
-#if !defined(CONFIG_FSL_DDR1)
+#if !defined(CONFIG_SYS_FSL_DDR1)
    set_timing_cfg_0(ddr, popts, dimm_params);
 #endif
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/ddr1_dimm_params.c b/drivers/ddr/fsl/ddr1_dimm_params.c
similarity index 99%
rename from arch/powerpc/cpu/mpc8xxx/ddr/ddr1_dimm_params.c
rename to drivers/ddr/fsl/ddr1_dimm_params.c
index f137fce..7df27b9 100644
--- a/arch/powerpc/cpu/mpc8xxx/ddr/ddr1_dimm_params.c
+++ b/drivers/ddr/fsl/ddr1_dimm_params.c
@@ -7,9 +7,9 @@
  */
#include <common.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
-#include "ddr.h"
+#include <fsl_ddr.h>
/*
  * Calculate the Density of each Physical Rank.
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/ddr2_dimm_params.c b/drivers/ddr/fsl/ddr2_dimm_params.c
similarity index 99%
rename from arch/powerpc/cpu/mpc8xxx/ddr/ddr2_dimm_params.c
rename to drivers/ddr/fsl/ddr2_dimm_params.c
index e4d02e8..d865df7 100644
--- a/arch/powerpc/cpu/mpc8xxx/ddr/ddr2_dimm_params.c
+++ b/drivers/ddr/fsl/ddr2_dimm_params.c
@@ -7,9 +7,9 @@
  */
#include <common.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
-#include "ddr.h"
+#include <fsl_ddr.h>
 /*
  * Calculate the Density of each Physical Rank.
  * Returned size is in bytes.
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c b/drivers/ddr/fsl/ddr3_dimm_params.c
similarity index 99%
rename from arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c
rename to drivers/ddr/fsl/ddr3_dimm_params.c
index 4c8645d..a4b8c10 100644
--- a/arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c
+++ b/drivers/ddr/fsl/ddr3_dimm_params.c
@@ -12,9 +12,9 @@
  */
#include <common.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
-#include "ddr.h"
+#include <fsl_ddr.h>
/*
  * Calculate the Density of each Physical Rank.
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/interactive.c b/drivers/ddr/fsl/interactive.c
similarity index 99%
rename from arch/powerpc/cpu/mpc8xxx/ddr/interactive.c
rename to drivers/ddr/fsl/interactive.c
index 3b66112..ebf3ed6 100644
--- a/arch/powerpc/cpu/mpc8xxx/ddr/interactive.c
+++ b/drivers/ddr/fsl/interactive.c
@@ -14,9 +14,10 @@
 #include <common.h>
 #include <linux/ctype.h>
 #include <asm/types.h>
+#include <asm/io.h>
-#include <asm/fsl_ddr_sdram.h>
-#include "ddr.h"
+#include <fsl_ddr_sdram.h>
+#include <fsl_ddr.h>
/* Option parameter Structures */
 struct options_string {
@@ -402,7 +403,7 @@ static void fsl_ddr_options_edit(fsl_ddr_info_t *pinfo,
    	CTRL_OPTIONS_CS(3, odt_rd_cfg),
    	CTRL_OPTIONS_CS(3, odt_wr_cfg),
 #endif
-#if defined(CONFIG_FSL_DDR3)
+#if defined(CONFIG_SYS_FSL_DDR3)
    	CTRL_OPTIONS_CS(0, odt_rtt_norm),
    	CTRL_OPTIONS_CS(0, odt_rtt_wr),
 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 1)
@@ -647,7 +648,7 @@ static void print_memctl_options(const memctl_options_t *popts)
    	CTRL_OPTIONS_CS(3, odt_rd_cfg),
    	CTRL_OPTIONS_CS(3, odt_wr_cfg),
 #endif
-#if defined(CONFIG_FSL_DDR3)
+#if defined(CONFIG_SYS_FSL_DDR3)
    	CTRL_OPTIONS_CS(0, odt_rtt_norm),
    	CTRL_OPTIONS_CS(0, odt_rtt_wr),
 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 1)
@@ -710,7 +711,7 @@ static void print_memctl_options(const memctl_options_t *popts)
    print_option_table(options, n_opts, popts);
 }
-#ifdef CONFIG_FSL_DDR1
+#ifdef CONFIG_SYS_FSL_DDR1
 void ddr1_spd_dump(const ddr1_spd_eeprom_t *spd)
 {
    unsigned int i;
@@ -859,7 +860,7 @@ void ddr1_spd_dump(const ddr1_spd_eeprom_t *spd)
 }
 #endif
-#ifdef CONFIG_FSL_DDR2
+#ifdef CONFIG_SYS_FSL_DDR2
 void ddr2_spd_dump(const ddr2_spd_eeprom_t *spd)
 {
    unsigned int i;
@@ -1051,7 +1052,7 @@ void ddr2_spd_dump(const ddr2_spd_eeprom_t *spd)
 }
 #endif
-#ifdef CONFIG_FSL_DDR3
+#ifdef CONFIG_SYS_FSL_DDR3
 void ddr3_spd_dump(const ddr3_spd_eeprom_t *spd)
 {
    unsigned int i;
@@ -1246,11 +1247,11 @@ void ddr3_spd_dump(const ddr3_spd_eeprom_t *spd)
static inline void generic_spd_dump(const generic_spd_eeprom_t *spd)
 {
-#if defined(CONFIG_FSL_DDR1)
+#if defined(CONFIG_SYS_FSL_DDR1)
    ddr1_spd_dump(spd);
-#elif defined(CONFIG_FSL_DDR2)
+#elif defined(CONFIG_SYS_FSL_DDR2)
    ddr2_spd_dump(spd);
-#elif defined(CONFIG_FSL_DDR3)
+#elif defined(CONFIG_SYS_FSL_DDR3)
    ddr3_spd_dump(spd);
 #endif
 }
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c b/drivers/ddr/fsl/lc_common_dimm_params.c
similarity index 98%
rename from arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
rename to drivers/ddr/fsl/lc_common_dimm_params.c
index 332fe25..610318a 100644
--- a/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
+++ b/drivers/ddr/fsl/lc_common_dimm_params.c
@@ -7,11 +7,11 @@
  */
#include <common.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
-#include "ddr.h"
+#include <fsl_ddr.h>
-#if defined(CONFIG_FSL_DDR3)
+#if defined(CONFIG_SYS_FSL_DDR3)
 static unsigned int
 compute_cas_latency_ddr3(const dimm_params_t *dimm_params,
    		 common_timing_params_t *outpdimm,
@@ -103,7 +103,7 @@ compute_lowest_common_dimm_parameters(const dimm_params_t *dimm_params,
unsigned int temp1, temp2;
    unsigned int additive_latency = 0;
-#if !defined(CONFIG_FSL_DDR3)
+#if !defined(CONFIG_SYS_FSL_DDR3)
    const unsigned int mclk_ps = get_memory_clk_period_ps();
    unsigned int lowest_good_caslat;
    unsigned int not_ok;
@@ -265,7 +265,7 @@ compute_lowest_common_dimm_parameters(const dimm_params_t *dimm_params,
    if (temp1 != 0)
    	printf("ERROR: Mix different RDIMM detected!\n");
-#if defined(CONFIG_FSL_DDR3)
+#if defined(CONFIG_SYS_FSL_DDR3)
    if (compute_cas_latency_ddr3(dimm_params, outpdimm, number_of_dimms))
    	return 1;
 #else
@@ -386,7 +386,7 @@ compute_lowest_common_dimm_parameters(const dimm_params_t *dimm_params,
    }
    outpdimm->highest_common_derated_caslat = temp1;
    debug("highest common dereated CAS latency = %u\n", temp1);
-#endif /* #if defined(CONFIG_FSL_DDR3) */
+#endif /* #if defined(CONFIG_SYS_FSL_DDR3) */
/* Determine if all DIMMs ECC capable. */
    temp1 = 1;
@@ -404,7 +404,7 @@ compute_lowest_common_dimm_parameters(const dimm_params_t *dimm_params,
    }
    outpdimm->all_dimms_ecc_capable = temp1;
-#ifndef CONFIG_FSL_DDR3
+#ifndef CONFIG_SYS_FSL_DDR3
    /* FIXME: move to somewhere else to validate. */
    if (mclk_ps > tckmax_max_ps) {
    	printf("Warning: some of the installed DIMMs "
@@ -467,7 +467,7 @@ compute_lowest_common_dimm_parameters(const dimm_params_t *dimm_params,
additive_latency = 0;
-#if defined(CONFIG_FSL_DDR2)
+#if defined(CONFIG_SYS_FSL_DDR2)
    if (lowest_good_caslat < 4) {
    	additive_latency = (picos_to_mclk(trcd_ps) > lowest_good_caslat)
    		? picos_to_mclk(trcd_ps) - lowest_good_caslat : 0;
@@ -478,7 +478,7 @@ compute_lowest_common_dimm_parameters(const dimm_params_t *dimm_params,
    	}
    }
-#elif defined(CONFIG_FSL_DDR3)
+#elif defined(CONFIG_SYS_FSL_DDR3)
    /*
     * The system will not use the global auto-precharge mode.
     * However, it uses the page mode, so we set AL=0
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/main.c b/drivers/ddr/fsl/main.c
similarity index 99%
rename from arch/powerpc/cpu/mpc8xxx/ddr/main.c
rename to drivers/ddr/fsl/main.c
index 34d8bc3a..c1cdbdf 100644
--- a/arch/powerpc/cpu/mpc8xxx/ddr/main.c
+++ b/drivers/ddr/fsl/main.c
@@ -14,10 +14,10 @@
#include <common.h>
 #include <i2c.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
 #include <asm/fsl_law.h>
-#include "ddr.h"
+#include <fsl_ddr.h>
void fsl_ddr_set_lawbar(
    	const common_timing_params_t *memctl_common_params,
diff --git a/arch/powerpc/cpu/mpc85xx/ddr-gen1.c b/drivers/ddr/fsl/mpc85xx_ddr_gen1.c
similarity index 93%
rename from arch/powerpc/cpu/mpc85xx/ddr-gen1.c
rename to drivers/ddr/fsl/mpc85xx_ddr_gen1.c
index 4dd8c0b..ff7d979 100644
--- a/arch/powerpc/cpu/mpc85xx/ddr-gen1.c
+++ b/drivers/ddr/fsl/mpc85xx_ddr_gen1.c
@@ -8,7 +8,7 @@
#include <common.h>
 #include <asm/io.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
#if (CONFIG_CHIP_SELECTS_PER_CTRL > 4)
 #error Invalid setting for CONFIG_CHIP_SELECTS_PER_CTRL
@@ -18,7 +18,7 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
    		     unsigned int ctrl_num, int step)
 {
    unsigned int i;
-	volatile ccsr_ddr_t *ddr = (void *)CONFIG_SYS_MPC8xxx_DDR_ADDR;
+	volatile ccsr_ddr_t *ddr = (void *)CONFIG_SYS_FSL_DDR_ADDR;
if (ctrl_num != 0) {
    	printf("%s unexpected ctrl_num = %u\n", __FUNCTION__, ctrl_num);
@@ -73,7 +73,7 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
 void
 ddr_enable_ecc(unsigned int dram_size)
 {
-	volatile ccsr_ddr_t *ddr= (void *)(CONFIG_SYS_MPC8xxx_DDR_ADDR);
+	volatile ccsr_ddr_t *ddr = (void *)(CONFIG_SYS_FSL_DDR_ADDR);
dma_meminit(CONFIG_MEM_INIT_VALUE, dram_size);
diff --git a/arch/powerpc/cpu/mpc85xx/ddr-gen2.c b/drivers/ddr/fsl/mpc85xx_ddr_gen2.c
similarity index 96%
rename from arch/powerpc/cpu/mpc85xx/ddr-gen2.c
rename to drivers/ddr/fsl/mpc85xx_ddr_gen2.c
index 542bc84..c22dea5 100644
--- a/arch/powerpc/cpu/mpc85xx/ddr-gen2.c
+++ b/drivers/ddr/fsl/mpc85xx_ddr_gen2.c
@@ -9,7 +9,7 @@
 #include <common.h>
 #include <asm/io.h>
 #include <asm/processor.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
#if (CONFIG_CHIP_SELECTS_PER_CTRL > 4)
 #error Invalid setting for CONFIG_CHIP_SELECTS_PER_CTRL
@@ -19,7 +19,7 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
    		     unsigned int ctrl_num, int step)
 {
    unsigned int i;
-	ccsr_ddr_t *ddr = (void *)CONFIG_SYS_MPC8xxx_DDR_ADDR;
+	ccsr_ddr_t *ddr = (void *)CONFIG_SYS_FSL_DDR_ADDR;
#if defined(CONFIG_SYS_FSL_ERRATUM_NMG_DDR120) && defined(CONFIG_MPC85xx)
    ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
diff --git a/arch/powerpc/cpu/mpc85xx/ddr-gen3.c b/drivers/ddr/fsl/mpc85xx_ddr_gen3.c
similarity index 97%
rename from arch/powerpc/cpu/mpc85xx/ddr-gen3.c
rename to drivers/ddr/fsl/mpc85xx_ddr_gen3.c
index 1be51d3..7b4e8ec 100644
--- a/arch/powerpc/cpu/mpc85xx/ddr-gen3.c
+++ b/drivers/ddr/fsl/mpc85xx_ddr_gen3.c
@@ -8,7 +8,7 @@
#include <common.h>
 #include <asm/io.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
 #include <asm/processor.h>
#if (CONFIG_CHIP_SELECTS_PER_CTRL > 4)
@@ -42,21 +42,21 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
switch (ctrl_num) {
    case 0:
-		ddr = (void *)CONFIG_SYS_MPC8xxx_DDR_ADDR;
+		ddr = (void *)CONFIG_SYS_FSL_DDR_ADDR;
    	break;
-#if defined(CONFIG_SYS_MPC8xxx_DDR2_ADDR) && (CONFIG_NUM_DDR_CONTROLLERS > 1)
+#if defined(CONFIG_SYS_FSL_DDR2_ADDR) && (CONFIG_NUM_DDR_CONTROLLERS > 1)
    case 1:
-		ddr = (void *)CONFIG_SYS_MPC8xxx_DDR2_ADDR;
+		ddr = (void *)CONFIG_SYS_FSL_DDR2_ADDR;
    	break;
 #endif
-#if defined(CONFIG_SYS_MPC8xxx_DDR3_ADDR) && (CONFIG_NUM_DDR_CONTROLLERS > 2)
+#if defined(CONFIG_SYS_FSL_DDR3_ADDR) && (CONFIG_NUM_DDR_CONTROLLERS > 2)
    case 2:
-		ddr = (void *)CONFIG_SYS_MPC8xxx_DDR3_ADDR;
+		ddr = (void *)CONFIG_SYS_FSL_DDR3_ADDR;
    	break;
 #endif
-#if defined(CONFIG_SYS_MPC8xxx_DDR4_ADDR) && (CONFIG_NUM_DDR_CONTROLLERS > 3)
+#if defined(CONFIG_SYS_FSL_DDR4_ADDR) && (CONFIG_NUM_DDR_CONTROLLERS > 3)
    case 3:
-		ddr = (void *)CONFIG_SYS_MPC8xxx_DDR4_ADDR;
+		ddr = (void *)CONFIG_SYS_FSL_DDR4_ADDR;
    	break;
 #endif
    default:
diff --git a/arch/powerpc/cpu/mpc86xx/ddr-8641.c b/drivers/ddr/fsl/mpc86xx_ddr.c
similarity index 95%
rename from arch/powerpc/cpu/mpc86xx/ddr-8641.c
rename to drivers/ddr/fsl/mpc86xx_ddr.c
index 33a91f9..caffbaf 100644
--- a/arch/powerpc/cpu/mpc86xx/ddr-8641.c
+++ b/drivers/ddr/fsl/mpc86xx_ddr.c
@@ -8,7 +8,7 @@
#include <common.h>
 #include <asm/io.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
#if (CONFIG_CHIP_SELECTS_PER_CTRL > 4)
 #error Invalid setting for CONFIG_CHIP_SELECTS_PER_CTRL
@@ -22,10 +22,10 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
switch (ctrl_num) {
    case 0:
-		ddr = (void *)CONFIG_SYS_MPC8xxx_DDR_ADDR;
+		ddr = (void *)CONFIG_SYS_FSL_DDR_ADDR;
    	break;
    case 1:
-		ddr = (void *)CONFIG_SYS_MPC8xxx_DDR2_ADDR;
+		ddr = (void *)CONFIG_SYS_FSL_DDR2_ADDR;
    	break;
    default:
    	printf("%s unexpected ctrl_num = %u\n", __FUNCTION__, ctrl_num);
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/options.c b/drivers/ddr/fsl/options.c
similarity index 97%
rename from arch/powerpc/cpu/mpc8xxx/ddr/options.c
rename to drivers/ddr/fsl/options.c
index 1297845..4aafcce 100644
--- a/arch/powerpc/cpu/mpc8xxx/ddr/options.c
+++ b/drivers/ddr/fsl/options.c
@@ -6,9 +6,9 @@
#include <common.h>
 #include <hwconfig.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
-#include "ddr.h"
+#include <fsl_ddr.h>
/*
  * Use our own stack based buffer before relocation to allow accessing longer
@@ -29,7 +29,7 @@ struct dynamic_odt {
    unsigned int odt_rtt_wr;
 };
-#ifdef CONFIG_FSL_DDR3
+#ifdef CONFIG_SYS_FSL_DDR3
 static const struct dynamic_odt single_Q[4] = {
    {	/* cs0 */
    	FSL_DDR_ODT_NEVER,
@@ -259,7 +259,7 @@ static const struct dynamic_odt odt_unknown[4] = {
    	DDR3_RTT_OFF
    }
 };
-#else	/* CONFIG_FSL_DDR3 */
+#else	/* CONFIG_SYS_FSL_DDR3 */
 static const struct dynamic_odt single_Q[4] = {
    {0, 0, 0, 0},
    {0, 0, 0, 0},
@@ -507,7 +507,7 @@ unsigned int populate_memctl_options(int all_dimms_registered,
    unsigned int i;
    char buffer[HWCONFIG_BUFFER_SIZE];
    char *buf = NULL;
-#if defined(CONFIG_FSL_DDR3) || defined(CONFIG_FSL_DDR2)
+#if defined(CONFIG_SYS_FSL_DDR3) || defined(CONFIG_SYS_FSL_DDR2)
    const struct dynamic_odt *pdodt = odt_unknown;
 #endif
    ulong ddr_freq;
@@ -519,7 +519,7 @@ unsigned int populate_memctl_options(int all_dimms_registered,
    if (getenv_f("hwconfig", buffer, sizeof(buffer)) > 0)
    	buf = buffer;
-#if defined(CONFIG_FSL_DDR3) || defined(CONFIG_FSL_DDR2)
+#if defined(CONFIG_SYS_FSL_DDR3) || defined(CONFIG_SYS_FSL_DDR2)
    /* Chip select options. */
    if (CONFIG_DIMM_SLOTS_PER_CTLR == 1) {
    	switch (pdimm[0].n_ranks) {
@@ -585,7 +585,7 @@ unsigned int populate_memctl_options(int all_dimms_registered,
/* Pick chip-select local options. */
    for (i = 0; i < CONFIG_CHIP_SELECTS_PER_CTRL; i++) {
-#if defined(CONFIG_FSL_DDR3) || defined(CONFIG_FSL_DDR2)
+#if defined(CONFIG_SYS_FSL_DDR3) || defined(CONFIG_SYS_FSL_DDR2)
    	popts->cs_local_opts[i].odt_rd_cfg = pdodt[i].odt_rd_cfg;
    	popts->cs_local_opts[i].odt_wr_cfg = pdodt[i].odt_wr_cfg;
    	popts->cs_local_opts[i].odt_rtt_norm = pdodt[i].odt_rtt_norm;
@@ -655,9 +655,9 @@ unsigned int populate_memctl_options(int all_dimms_registered,
     * 0 for DDR1
     * 1 for DDR2
     */
-#if defined(CONFIG_FSL_DDR1)
+#if defined(CONFIG_SYS_FSL_DDR1)
    popts->dqs_config = 0;
-#elif defined(CONFIG_FSL_DDR2) || defined(CONFIG_FSL_DDR3)
+#elif defined(CONFIG_SYS_FSL_DDR2) || defined(CONFIG_SYS_FSL_DDR3)
    popts->dqs_config = 1;
 #endif
@@ -672,7 +672,7 @@ unsigned int populate_memctl_options(int all_dimms_registered,
     * presuming all dimms are similar
     * 0 = 64-bit, 1 = 32-bit, 2 = 16-bit
     */
-#if defined(CONFIG_FSL_DDR1) || defined(CONFIG_FSL_DDR2)
+#if defined(CONFIG_SYS_FSL_DDR1) || defined(CONFIG_SYS_FSL_DDR2)
    if (pdimm[0].n_ranks != 0) {
    	if ((pdimm[0].data_width >= 64) && \
    		(pdimm[0].data_width <= 72))
@@ -703,7 +703,7 @@ unsigned int populate_memctl_options(int all_dimms_registered,
    popts->x4_en = (pdimm[0].device_width == 4) ? 1 : 0;
/* Choose burst length. */
-#if defined(CONFIG_FSL_DDR3)
+#if defined(CONFIG_SYS_FSL_DDR3)
 #if defined(CONFIG_E500MC)
    popts->otf_burst_chop_en = 0;	/* on-the-fly burst chop disable */
    popts->burst_length = DDR_BL8;	/* Fixed 8-beat burst len */
@@ -722,7 +722,7 @@ unsigned int populate_memctl_options(int all_dimms_registered,
 #endif
/* Choose ddr controller address mirror mode */
-#if defined(CONFIG_FSL_DDR3)
+#if defined(CONFIG_SYS_FSL_DDR3)
    popts->mirrored_dimm = pdimm[0].mirrored_dimm;
 #endif
@@ -785,22 +785,22 @@ unsigned int populate_memctl_options(int all_dimms_registered,
     * FIXME: varies depending upon number of column addresses or data
     * FIXME: width, was considering looking at pdimm->primary_sdram_width
     */
-#if defined(CONFIG_FSL_DDR1)
+#if defined(CONFIG_SYS_FSL_DDR1)
    popts->tfaw_window_four_activates_ps = mclk_to_picos(1);
-#elif defined(CONFIG_FSL_DDR2)
+#elif defined(CONFIG_SYS_FSL_DDR2)
    /*
     * x4/x8;  some datasheets have 35000
     * x16 wide columns only?  Use 50000?
     */
    popts->tfaw_window_four_activates_ps = 37500;
-#elif defined(CONFIG_FSL_DDR3)
+#elif defined(CONFIG_SYS_FSL_DDR3)
    popts->tfaw_window_four_activates_ps = pdimm[0].tfaw_ps;
 #endif
    popts->zq_en = 0;
    popts->wrlvl_en = 0;
-#if defined(CONFIG_FSL_DDR3)
+#if defined(CONFIG_SYS_FSL_DDR3)
    /*
     * due to ddr3 dimm is fly-by topology
     * we suggest to enable write leveling to
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/util.c b/drivers/ddr/fsl/util.c
similarity index 96%
rename from arch/powerpc/cpu/mpc8xxx/ddr/util.c
rename to drivers/ddr/fsl/util.c
index acfe1f0..45a7bcc 100644
--- a/arch/powerpc/cpu/mpc8xxx/ddr/util.c
+++ b/drivers/ddr/fsl/util.c
@@ -10,7 +10,8 @@
 #include <asm/fsl_law.h>
 #include <div64.h>
-#include "ddr.h"
+#include <fsl_ddr.h>
+#include <asm/io.h>
/* To avoid 64-bit full-divides, we factor this here */
 #define ULL_2E12 2000000000000ULL
@@ -133,7 +134,7 @@ u32 fsl_ddr_get_intl3r(void)
void board_add_ram_info(int use_default)
 {
-	ccsr_ddr_t *ddr = (void *)(CONFIG_SYS_MPC8xxx_DDR_ADDR);
+	ccsr_ddr_t *ddr = (void *)(CONFIG_SYS_FSL_DDR_ADDR);
#if	defined(CONFIG_E6500) && (CONFIG_NUM_DDR_CONTROLLERS == 3)
    u32 *mcintl3r = (void *) (CONFIG_SYS_IMMR + 0x18004);
@@ -146,13 +147,13 @@ void board_add_ram_info(int use_default)
#if CONFIG_NUM_DDR_CONTROLLERS >= 2
    if (!(sdram_cfg & SDRAM_CFG_MEM_EN)) {
-		ddr = (void __iomem *)CONFIG_SYS_MPC8xxx_DDR2_ADDR;
+		ddr = (void __iomem *)CONFIG_SYS_FSL_DDR2_ADDR;
    	sdram_cfg = in_be32(&ddr->sdram_cfg);
    }
 #endif
 #if CONFIG_NUM_DDR_CONTROLLERS >= 3
    if (!(sdram_cfg & SDRAM_CFG_MEM_EN)) {
-		ddr = (void __iomem *)CONFIG_SYS_MPC8xxx_DDR3_ADDR;
+		ddr = (void __iomem *)CONFIG_SYS_FSL_DDR3_ADDR;
    	sdram_cfg = in_be32(&ddr->sdram_cfg);
    }
 #endif
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/common_timing_params.h b/include/common_timing_params.h
similarity index 100%
rename from arch/powerpc/cpu/mpc8xxx/ddr/common_timing_params.h
rename to include/common_timing_params.h
diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h
index 268f66e..b2a5c19 100644
--- a/include/configs/B4860QDS.h
+++ b/include/configs/B4860QDS.h
@@ -193,7 +193,7 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_DDR_SPD
 #define CONFIG_SYS_DDR_RAW_TIMING
-#define CONFIG_FSL_DDR3
+#define CONFIG_SYS_FSL_DDR3
 #define CONFIG_FSL_DDR_INTERACTIVE
#define CONFIG_SYS_SPD_BUS_NUM	0
diff --git a/include/configs/BSC9131RDB.h b/include/configs/BSC9131RDB.h
index 036f264..499d8c2 100644
--- a/include/configs/BSC9131RDB.h
+++ b/include/configs/BSC9131RDB.h
@@ -80,7 +80,7 @@
 #define CONFIG_SYS_MEMTEST_END		0x01ffffff
/* DDR Setup */
-#define CONFIG_FSL_DDR3
+#define CONFIG_SYS_FSL_DDR3
 #undef CONFIG_SYS_DDR_RAW_TIMING
 #undef CONFIG_DDR_SPD
 #define CONFIG_SYS_SPD_BUS_NUM		0
diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h
index 75889b3..a6601fe 100644
--- a/include/configs/BSC9132QDS.h
+++ b/include/configs/BSC9132QDS.h
@@ -134,7 +134,7 @@
 #define CONFIG_SYS_MEMTEST_END		0x01ffffff
/* DDR Setup */
-#define CONFIG_FSL_DDR3
+#define CONFIG_SYS_FSL_DDR3
 #define CONFIG_SYS_SPD_BUS_NUM		0
 #define SPD_EEPROM_ADDRESS1		0x54 /* I2C access */
 #define SPD_EEPROM_ADDRESS2		0x56 /* I2C access */
diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h
index 08156c5..f173b07 100644
--- a/include/configs/C29XPCIE.h
+++ b/include/configs/C29XPCIE.h
@@ -103,7 +103,7 @@
 #define CONFIG_PANIC_HANG
/* DDR Setup */
-#define CONFIG_FSL_DDR3
+#define CONFIG_SYS_FSL_DDR3
 #define CONFIG_DDR_SPD
 #define CONFIG_SYS_SPD_BUS_NUM		0
 #define SPD_EEPROM_ADDRESS		0x50
diff --git a/include/configs/HWW1U1A.h b/include/configs/HWW1U1A.h
index f3f2136..bbfee7d 100644
--- a/include/configs/HWW1U1A.h
+++ b/include/configs/HWW1U1A.h
@@ -255,7 +255,7 @@
 /* -------------------------------------------------------------------- */
/* FreeScale DDR2/3 SDRAM Controller */
-#define CONFIG_FSL_DDR2		/* Our SDRAM slot is DDR2		*/
+#define CONFIG_SYS_FSL_DDR2		/* Our SDRAM slot is DDR2		*/
 #define CONFIG_DDR_ECC		/* Enable ECC by default		*/
 #define CONFIG_DDR_SPD		/* Detect DDR config from SPD EEPROM	*/
 #define CONFIG_SPD_EEPROM	/* ...why 2 config variables for this?	*/
diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h
index 3f742a2..a80a696 100644
--- a/include/configs/MPC8349EMDS.h
+++ b/include/configs/MPC8349EMDS.h
@@ -62,11 +62,11 @@
 #define CONFIG_SPD_EEPROM		/* use SPD EEPROM for DDR setup*/
/*
- * define CONFIG_FSL_DDR2 to use unified DDR driver
+ * define CONFIG_SYS_FSL_DDR2 to use unified DDR driver
  * undefine it to use old spd_sdram.c
  */
-#define CONFIG_FSL_DDR2
-#ifdef CONFIG_FSL_DDR2
+#define CONFIG_SYS_FSL_DDR2
+#ifdef CONFIG_SYS_FSL_DDR2
 #define CONFIG_SYS_SPD_BUS_NUM	0
 #define SPD_EEPROM_ADDRESS1	0x52
 #define SPD_EEPROM_ADDRESS2	0x51
diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h
index 8197f89..9ab1bc1 100644
--- a/include/configs/MPC8536DS.h
+++ b/include/configs/MPC8536DS.h
@@ -122,7 +122,7 @@
/* DDR Setup */
 #define CONFIG_VERY_BIG_RAM
-#define CONFIG_FSL_DDR2
+#define CONFIG_SYS_FSL_DDR2
 #undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM		/* Use SPD EEPROM for DDR setup */
 #define CONFIG_DDR_SPD
diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h
index 6689368..046b14b 100644
--- a/include/configs/MPC8540ADS.h
+++ b/include/configs/MPC8540ADS.h
@@ -78,7 +78,7 @@
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR
/* DDR Setup */
-#define CONFIG_FSL_DDR1
+#define CONFIG_SYS_FSL_DDR1
 #define CONFIG_SPD_EEPROM		/* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_SPD
 #undef CONFIG_FSL_DDR_INTERACTIVE
diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h
index e24c597..eca3b53 100644
--- a/include/configs/MPC8541CDS.h
+++ b/include/configs/MPC8541CDS.h
@@ -51,7 +51,7 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR
/* DDR Setup */
-#define CONFIG_FSL_DDR1
+#define CONFIG_SYS_FSL_DDR1
 #define CONFIG_SPD_EEPROM		/* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_SPD
 #undef CONFIG_FSL_DDR_INTERACTIVE
diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h
index 2e76df6..8132ec0 100644
--- a/include/configs/MPC8544DS.h
+++ b/include/configs/MPC8544DS.h
@@ -63,7 +63,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR
/* DDR Setup */
-#define CONFIG_FSL_DDR2
+#define CONFIG_SYS_FSL_DDR2
 #undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM		/* Use SPD EEPROM for DDR setup */
 #define CONFIG_DDR_SPD
diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index 9ff048a..6acd54d 100644
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -75,7 +75,7 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR
/* DDR Setup */
-#define CONFIG_FSL_DDR2
+#define CONFIG_SYS_FSL_DDR2
 #undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM		/* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_SPD
diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h
index 7f0f927..5ffdd01 100644
--- a/include/configs/MPC8555CDS.h
+++ b/include/configs/MPC8555CDS.h
@@ -51,7 +51,7 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR
/* DDR Setup */
-#define CONFIG_FSL_DDR1
+#define CONFIG_SYS_FSL_DDR1
 #define CONFIG_SPD_EEPROM		/* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_SPD
 #undef CONFIG_FSL_DDR_INTERACTIVE
diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h
index b7c4a60..bb9ae2d 100644
--- a/include/configs/MPC8560ADS.h
+++ b/include/configs/MPC8560ADS.h
@@ -75,7 +75,7 @@
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR
/* DDR Setup */
-#define CONFIG_FSL_DDR1
+#define CONFIG_SYS_FSL_DDR1
 #define CONFIG_SPD_EEPROM		/* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_SPD
 #undef CONFIG_FSL_DDR_INTERACTIVE
diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h
index c9a1539..7406ac3 100644
--- a/include/configs/MPC8568MDS.h
+++ b/include/configs/MPC8568MDS.h
@@ -60,7 +60,7 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR
/* DDR Setup */
-#define CONFIG_FSL_DDR2
+#define CONFIG_SYS_FSL_DDR2
 #undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM		/* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_SPD
diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h
index 341f6a8..df5572b 100644
--- a/include/configs/MPC8569MDS.h
+++ b/include/configs/MPC8569MDS.h
@@ -98,7 +98,7 @@ extern unsigned long get_clock_freq(void);
 #endif
/* DDR Setup */
-#define CONFIG_FSL_DDR3
+#define CONFIG_SYS_FSL_DDR3
 #undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM		/* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_SPD
diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h
index c751144..afb195f 100644
--- a/include/configs/MPC8572DS.h
+++ b/include/configs/MPC8572DS.h
@@ -106,7 +106,7 @@
/* DDR Setup */
 #define CONFIG_VERY_BIG_RAM
-#define CONFIG_FSL_DDR2
+#define CONFIG_SYS_FSL_DDR2
 #undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM		/* Use SPD EEPROM for DDR setup */
 #define CONFIG_DDR_SPD
diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h
index 97f5c87..41ebe31 100644
--- a/include/configs/MPC8610HPCD.h
+++ b/include/configs/MPC8610HPCD.h
@@ -92,7 +92,7 @@
 #define CONFIG_SYS_CCSRBAR_PHYS		CONFIG_SYS_CCSRBAR_PHYS_LOW
/* DDR Setup */
-#define CONFIG_FSL_DDR2
+#define CONFIG_SYS_FSL_DDR2
 #undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM		/* Use SPD for DDR */
 #define CONFIG_DDR_SPD
diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h
index 8ed5050..0e666ba 100644
--- a/include/configs/MPC8641HPCN.h
+++ b/include/configs/MPC8641HPCN.h
@@ -108,7 +108,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 /*
  * DDR Setup
  */
-#define CONFIG_FSL_DDR2
+#define CONFIG_SYS_FSL_DDR2
 #undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM		/* Use SPD EEPROM for DDR setup */
 #define CONFIG_DDR_SPD
diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index c1cfbd4..f3a4665 100644
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -178,7 +178,7 @@
 #define CONFIG_PANIC_HANG		/* do not reset board on panic */
/* DDR Setup */
-#define CONFIG_FSL_DDR3
+#define CONFIG_SYS_FSL_DDR3
 #define CONFIG_SYS_DDR_RAW_TIMING
 #define CONFIG_DDR_SPD
 #define CONFIG_SYS_SPD_BUS_NUM		1
diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h
index 1470526..262c3e5 100644
--- a/include/configs/P1022DS.h
+++ b/include/configs/P1022DS.h
@@ -177,7 +177,7 @@
 /* DDR Setup */
 #define CONFIG_DDR_SPD
 #define CONFIG_VERY_BIG_RAM
-#define CONFIG_FSL_DDR3
+#define CONFIG_SYS_FSL_DDR3
#ifdef CONFIG_DDR_ECC
 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
diff --git a/include/configs/P1023RDB.h b/include/configs/P1023RDB.h
index e49523e..7de6814 100644
--- a/include/configs/P1023RDB.h
+++ b/include/configs/P1023RDB.h
@@ -74,7 +74,7 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_CHIP_SELECTS_PER_CTRL	1
#define CONFIG_DDR_SPD
-#define CONFIG_FSL_DDR3
+#define CONFIG_SYS_FSL_DDR3
 #define CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SYS_SDRAM_SIZE		512u	/* DDR is 512M */
 #define CONFIG_SYS_SPD_BUS_NUM          0
diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h
index 282f5c1..b592c19 100644
--- a/include/configs/P1_P2_RDB.h
+++ b/include/configs/P1_P2_RDB.h
@@ -141,7 +141,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #endif
/* DDR Setup */
-#define CONFIG_FSL_DDR2
+#define CONFIG_SYS_FSL_DDR2
 #undef CONFIG_FSL_DDR_INTERACTIVE
 #undef CONFIG_SPD_EEPROM		/* Use SPD EEPROM for DDR setup */
diff --git a/include/configs/P2020COME.h b/include/configs/P2020COME.h
index 9cc219e..15d2a43 100644
--- a/include/configs/P2020COME.h
+++ b/include/configs/P2020COME.h
@@ -105,7 +105,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR
/* DDR Setup */
-#define CONFIG_FSL_DDR3
+#define CONFIG_SYS_FSL_DDR3
 #define CONFIG_SPD_EEPROM		/* Use SPD EEPROM for DDR setup */
 #define CONFIG_DDR_SPD
diff --git a/include/configs/P2020DS.h b/include/configs/P2020DS.h
index 8a29eaa..9d3d9b3 100644
--- a/include/configs/P2020DS.h
+++ b/include/configs/P2020DS.h
@@ -109,9 +109,9 @@
 /* DDR Setup */
 #define CONFIG_VERY_BIG_RAM
 #ifdef CONFIG_DDR2
-#define CONFIG_FSL_DDR2
+#define CONFIG_SYS_FSL_DDR2
 #else
-#define CONFIG_FSL_DDR3		1
+#define CONFIG_SYS_FSL_DDR3		1
 #endif
/* ECC will be enabled based on perf_mode environment variable */
diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h
index 0df6f1a..b238574 100644
--- a/include/configs/P2041RDB.h
+++ b/include/configs/P2041RDB.h
@@ -175,7 +175,7 @@ unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_CHIP_SELECTS_PER_CTRL	(4 * CONFIG_DIMM_SLOTS_PER_CTLR)
#define CONFIG_DDR_SPD
-#define CONFIG_FSL_DDR3
+#define CONFIG_SYS_FSL_DDR3
#define CONFIG_SYS_SPD_BUS_NUM	0
 #define SPD_EEPROM_ADDRESS	0x52
diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h
index 7c6bec8..43a5778 100644
--- a/include/configs/T1040QDS.h
+++ b/include/configs/T1040QDS.h
@@ -170,7 +170,7 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_CHIP_SELECTS_PER_CTRL	(4 * CONFIG_DIMM_SLOTS_PER_CTLR)
#define CONFIG_DDR_SPD
-#define CONFIG_FSL_DDR3
+#define CONFIG_SYS_FSL_DDR3
 #define CONFIG_FSL_DDR_INTERACTIVE
#define CONFIG_SYS_SPD_BUS_NUM	0
diff --git a/include/configs/T1040RDB.h b/include/configs/T1040RDB.h
index 620387f..7931231 100644
--- a/include/configs/T1040RDB.h
+++ b/include/configs/T1040RDB.h
@@ -156,7 +156,7 @@
#define CONFIG_DDR_SPD
 #define CONFIG_SYS_DDR_RAW_TIMING
-#define CONFIG_FSL_DDR3
+#define CONFIG_SYS_FSL_DDR3
#define CONFIG_SYS_SPD_BUS_NUM	0
 #define SPD_EEPROM_ADDRESS	0x51
diff --git a/include/configs/T1042RDB_PI.h b/include/configs/T1042RDB_PI.h
index 4b023f9..eff08e3 100644
--- a/include/configs/T1042RDB_PI.h
+++ b/include/configs/T1042RDB_PI.h
@@ -156,7 +156,7 @@
#define CONFIG_DDR_SPD
 #define CONFIG_SYS_DDR_RAW_TIMING
-#define CONFIG_FSL_DDR3
+#define CONFIG_SYS_FSL_DDR3
#define CONFIG_SYS_SPD_BUS_NUM	0
 #define SPD_EEPROM_ADDRESS	0x51
diff --git a/include/configs/controlcenterd.h b/include/configs/controlcenterd.h
index 413f086..46d4f98 100644
--- a/include/configs/controlcenterd.h
+++ b/include/configs/controlcenterd.h
@@ -138,7 +138,7 @@
 #define CONFIG_SYS_SDRAM_SIZE 1024
 #define CONFIG_VERY_BIG_RAM
-#define CONFIG_FSL_DDR3
+#define CONFIG_SYS_FSL_DDR3
 #define CONFIG_NUM_DDR_CONTROLLERS	1
 #define CONFIG_DIMM_SLOTS_PER_CTLR	1
 #define CONFIG_CHIP_SELECTS_PER_CTRL	(2 * CONFIG_DIMM_SLOTS_PER_CTLR)
diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index 562caa5..665295c 100644
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -173,7 +173,7 @@
 #define CONFIG_CHIP_SELECTS_PER_CTRL	(4 * CONFIG_DIMM_SLOTS_PER_CTLR)
#define CONFIG_DDR_SPD
-#define CONFIG_FSL_DDR3
+#define CONFIG_SYS_FSL_DDR3
#define CONFIG_SYS_SPD_BUS_NUM	1
 #define SPD_EEPROM_ADDRESS1	0x51
diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h
index 2d5320b..7700b38 100644
--- a/include/configs/km/kmp204x-common.h
+++ b/include/configs/km/kmp204x-common.h
@@ -111,7 +111,7 @@ unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_CHIP_SELECTS_PER_CTRL	(4 * CONFIG_DIMM_SLOTS_PER_CTLR)
#define CONFIG_DDR_SPD
-#define CONFIG_FSL_DDR3
+#define CONFIG_SYS_FSL_DDR3
 #define CONFIG_FSL_DDR_INTERACTIVE
#define CONFIG_SYS_SPD_BUS_NUM	0
diff --git a/include/configs/mpq101.h b/include/configs/mpq101.h
index 6d0d392..ec09e15 100644
--- a/include/configs/mpq101.h
+++ b/include/configs/mpq101.h
@@ -52,7 +52,7 @@
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR
/* DDR Setup */
-#define CONFIG_FSL_DDR2
+#define CONFIG_SYS_FSL_DDR2
#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index 91a6782..57ed019 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -325,7 +325,7 @@
 #endif
/* DDR Setup */
-#define CONFIG_FSL_DDR3
+#define CONFIG_SYS_FSL_DDR3
 #define CONFIG_SYS_DDR_RAW_TIMING
 #define CONFIG_DDR_SPD
 #define CONFIG_SYS_SPD_BUS_NUM 1
diff --git a/include/configs/p1_twr.h b/include/configs/p1_twr.h
index 76189e1..9837100 100644
--- a/include/configs/p1_twr.h
+++ b/include/configs/p1_twr.h
@@ -89,7 +89,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR
/* DDR Setup */
-#define CONFIG_FSL_DDR3
+#define CONFIG_SYS_FSL_DDR3
#define CONFIG_SYS_SDRAM_SIZE_LAW	LAW_SIZE_512M
 #define CONFIG_CHIP_SELECTS_PER_CTRL	1
diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h
index 6d97060..bdb8eb5 100644
--- a/include/configs/sbc8548.h
+++ b/include/configs/sbc8548.h
@@ -102,7 +102,7 @@
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR
/* DDR Setup */
-#define CONFIG_FSL_DDR2
+#define CONFIG_SYS_FSL_DDR2
 #undef CONFIG_FSL_DDR_INTERACTIVE
 #undef CONFIG_DDR_ECC			/* only for ECC DDR module */
 /*
diff --git a/include/configs/socrates.h b/include/configs/socrates.h
index b6fbe23..0e6b864 100644
--- a/include/configs/socrates.h
+++ b/include/configs/socrates.h
@@ -80,7 +80,7 @@
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR
/* DDR Setup */
-#define CONFIG_FSL_DDR2
+#define CONFIG_SYS_FSL_DDR2
 #undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM		/* Use SPD EEPROM for DDR setup */
 #define CONFIG_DDR_SPD
diff --git a/include/configs/stxgp3.h b/include/configs/stxgp3.h
index 9b3f0cc..ee1f1f3 100644
--- a/include/configs/stxgp3.h
+++ b/include/configs/stxgp3.h
@@ -98,7 +98,7 @@
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR
/* DDR Setup */
-#define CONFIG_FSL_DDR1
+#define CONFIG_SYS_FSL_DDR1
 #define CONFIG_SPD_EEPROM		/* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_SPD
 #undef CONFIG_FSL_DDR_INTERACTIVE
diff --git a/include/configs/stxssa.h b/include/configs/stxssa.h
index 805814f..63dd767 100644
--- a/include/configs/stxssa.h
+++ b/include/configs/stxssa.h
@@ -112,7 +112,7 @@
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR
/* DDR Setup */
-#define CONFIG_FSL_DDR1
+#define CONFIG_SYS_FSL_DDR1
 #define CONFIG_SPD_EEPROM		/* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_SPD
 #undef CONFIG_FSL_DDR_INTERACTIVE
diff --git a/include/configs/t4qds.h b/include/configs/t4qds.h
index 3f54f14..d9b0ed0 100644
--- a/include/configs/t4qds.h
+++ b/include/configs/t4qds.h
@@ -87,7 +87,7 @@
 #define CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
#define CONFIG_DDR_SPD
-#define CONFIG_FSL_DDR3
+#define CONFIG_SYS_FSL_DDR3
/*
diff --git a/include/configs/xpedite517x.h b/include/configs/xpedite517x.h
index 4738c23..88d7f88 100644
--- a/include/configs/xpedite517x.h
+++ b/include/configs/xpedite517x.h
@@ -40,7 +40,7 @@
 /*
  * DDR config
  */
-#define CONFIG_FSL_DDR2
+#define CONFIG_SYS_FSL_DDR2
 #define CONFIG_SPD_EEPROM		/* Use SPD EEPROM for DDR setup */
 #define CONFIG_DDR_SPD
 #define CONFIG_MEM_INIT_VALUE		0xdeadbeef
diff --git a/include/configs/xpedite520x.h b/include/configs/xpedite520x.h
index 3342880..f39d6f9 100644
--- a/include/configs/xpedite520x.h
+++ b/include/configs/xpedite520x.h
@@ -39,7 +39,7 @@
 /*
  * DDR config
  */
-#define CONFIG_FSL_DDR2
+#define CONFIG_SYS_FSL_DDR2
 #undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM		/* Use SPD EEPROM for DDR setup */
 #define CONFIG_DDR_SPD
diff --git a/include/configs/xpedite537x.h b/include/configs/xpedite537x.h
index 9da845d..e1bdf90 100644
--- a/include/configs/xpedite537x.h
+++ b/include/configs/xpedite537x.h
@@ -49,7 +49,7 @@
 /*
  * DDR config
  */
-#define CONFIG_FSL_DDR2
+#define CONFIG_SYS_FSL_DDR2
 #undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM		/* Use SPD EEPROM for DDR setup */
 #define CONFIG_DDR_SPD
diff --git a/include/configs/xpedite550x.h b/include/configs/xpedite550x.h
index 4137cc9..2328c7a 100644
--- a/include/configs/xpedite550x.h
+++ b/include/configs/xpedite550x.h
@@ -49,7 +49,7 @@
 /*
  * DDR config
  */
-#define CONFIG_FSL_DDR3
+#define CONFIG_SYS_FSL_DDR3
 #define CONFIG_SPD_EEPROM		/* Use SPD EEPROM for DDR setup */
 #define CONFIG_DDR_SPD
 #define CONFIG_MEM_INIT_VALUE		0xdeadbeef
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/ddr.h b/include/fsl_ddr.h
similarity index 97%
rename from arch/powerpc/cpu/mpc8xxx/ddr/ddr.h
rename to include/fsl_ddr.h
index e3b414e..e03f9db 100644
--- a/arch/powerpc/cpu/mpc8xxx/ddr/ddr.h
+++ b/include/fsl_ddr.h
@@ -9,10 +9,10 @@
 #ifndef FSL_DDR_MAIN_H
 #define FSL_DDR_MAIN_H
-#include <asm/fsl_ddr_sdram.h>
-#include <asm/fsl_ddr_dimm_params.h>
+#include <fsl_ddr_sdram.h>
+#include <fsl_ddr_dimm_params.h>
-#include "common_timing_params.h"
+#include <common_timing_params.h>
#if defined(CONFIG_DDR_SPD) || defined(CONFIG_SPD_EEPROM)
 /*
diff --git a/arch/powerpc/include/asm/fsl_ddr_dimm_params.h b/include/fsl_ddr_dimm_params.h
similarity index 100%
rename from arch/powerpc/include/asm/fsl_ddr_dimm_params.h
rename to include/fsl_ddr_dimm_params.h
diff --git a/arch/powerpc/include/asm/fsl_ddr_sdram.h b/include/fsl_ddr_sdram.h
similarity index 98%
rename from arch/powerpc/include/asm/fsl_ddr_sdram.h
rename to include/fsl_ddr_sdram.h
index 2c3c514..16cccc7 100644
--- a/arch/powerpc/include/asm/fsl_ddr_sdram.h
+++ b/include/fsl_ddr_sdram.h
@@ -36,25 +36,25 @@
 #define DDR2_RTT_150_OHM	2
 #define DDR2_RTT_50_OHM		3
-#if defined(CONFIG_FSL_DDR1)
+#if defined(CONFIG_SYS_FSL_DDR1)
 #define FSL_DDR_MIN_TCKE_PULSE_WIDTH_DDR	(1)
 typedef ddr1_spd_eeprom_t generic_spd_eeprom_t;
 #ifndef CONFIG_FSL_SDRAM_TYPE
 #define CONFIG_FSL_SDRAM_TYPE	SDRAM_TYPE_DDR1
 #endif
-#elif defined(CONFIG_FSL_DDR2)
+#elif defined(CONFIG_SYS_FSL_DDR2)
 #define FSL_DDR_MIN_TCKE_PULSE_WIDTH_DDR	(3)
 typedef ddr2_spd_eeprom_t generic_spd_eeprom_t;
 #ifndef CONFIG_FSL_SDRAM_TYPE
 #define CONFIG_FSL_SDRAM_TYPE	SDRAM_TYPE_DDR2
 #endif
-#elif defined(CONFIG_FSL_DDR3)
+#elif defined(CONFIG_SYS_FSL_DDR3)
 #define FSL_DDR_MIN_TCKE_PULSE_WIDTH_DDR	(3)	/* FIXME */
 typedef ddr3_spd_eeprom_t generic_spd_eeprom_t;
 #ifndef CONFIG_FSL_SDRAM_TYPE
 #define CONFIG_FSL_SDRAM_TYPE	SDRAM_TYPE_DDR3
 #endif
-#endif	/* #if defined(CONFIG_FSL_DDR1) */
+#endif	/* #if defined(CONFIG_SYS_FSL_DDR1) */
#define FSL_DDR_ODT_NEVER		0x0
 #define FSL_DDR_ODT_CS			0x1
diff --git a/nand_spl/board/freescale/mpc8569mds/nand_boot.c b/nand_spl/board/freescale/mpc8569mds/nand_boot.c
index 716b737..ce7f619 100644
--- a/nand_spl/board/freescale/mpc8569mds/nand_boot.c
+++ b/nand_spl/board/freescale/mpc8569mds/nand_boot.c
@@ -10,7 +10,7 @@
 #include <nand.h>
 #include <asm/mmu.h>
 #include <asm/immap_85xx.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
 #include <asm/fsl_law.h>
#define SYSCLK_66       66666666
diff --git a/nand_spl/board/freescale/p1023rds/nand_boot.c b/nand_spl/board/freescale/p1023rds/nand_boot.c
index 9468000..58e6cbf 100644
--- a/nand_spl/board/freescale/p1023rds/nand_boot.c
+++ b/nand_spl/board/freescale/p1023rds/nand_boot.c
@@ -10,7 +10,7 @@
 #include <asm/io.h>
 #include <nand.h>
 #include <asm/fsl_law.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
 #include <asm/global_data.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -18,7 +18,7 @@ DECLARE_GLOBAL_DATA_PTR;
 /* Fixed sdram init -- doesn't use serial presence detect. */
 void sdram_init(void)
 {
-	ccsr_ddr_t *ddr = (ccsr_ddr_t *)CONFIG_SYS_MPC8xxx_DDR_ADDR;
+	ccsr_ddr_t *ddr = (ccsr_ddr_t *)CONFIG_SYS_FSL_DDR_ADDR;
set_next_law(0, LAW_SIZE_2G, LAW_TRGT_IF_DDR_1);
diff --git a/nand_spl/board/freescale/p1_p2_rdb/nand_boot.c b/nand_spl/board/freescale/p1_p2_rdb/nand_boot.c
index 3244c8f..f7e8438 100644
--- a/nand_spl/board/freescale/p1_p2_rdb/nand_boot.c
+++ b/nand_spl/board/freescale/p1_p2_rdb/nand_boot.c
@@ -10,7 +10,7 @@
 #include <nand.h>
 #include <asm/mmu.h>
 #include <asm/immap_85xx.h>
-#include <asm/fsl_ddr_sdram.h>
+#include <fsl_ddr_sdram.h>
 #include <asm/fsl_law.h>
#define SYSCLK_MASK     0x00200000
diff --git a/spl/Makefile b/spl/Makefile
index cbd3d27..041c8f8 100644
--- a/spl/Makefile
+++ b/spl/Makefile
@@ -63,7 +63,7 @@ endif
 ifeq ($(CPU),mpc85xx)
 LIBS-y += arch/powerpc/cpu/mpc8xxx/lib8xxx.o
 ifdef CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
-LIBS-y += arch/powerpc/cpu/mpc8xxx/ddr/libddr.o
+LIBS-$(CONFIG_SYS_FSL_DDR) += drivers/ddr/fsl/libddr.o
 endif
 endif
 ifeq ($(CPU),mpc86xx)
-- 
1.7.9.5



    