On Wed, Apr 7, 2021 at 1:32 AM Eugen.Hristev@microchip.com wrote:
On 4/7/21 1:16 AM, Derald Woods wrote:
On Tue, Apr 6, 2021 at 4:40 AM Manuel Reis <mluis.reis@gmail.com mailto:mluis.reis@gmail.com> wrote:
in the early SPL boot stage whenever there is a call to udelay, dm_timer_init fails to find the pit timer whenever it traverses the device tree, if this property is not present Signed-off-by: Manuel Reis <mluis.reis@gmail.com <mailto:mluis.reis@gmail.com>> CC: Eugen Hristev <eugen.hristev@microchip.com <mailto:eugen.hristev@microchip.com>> --- arch/arm/dts/sama5d3.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/dts/sama5d3.dtsi b/arch/arm/dts/sama5d3.dtsi index 6ed218eaad..42c30e9f30 100644 --- a/arch/arm/dts/sama5d3.dtsi +++ b/arch/arm/dts/sama5d3.dtsi @@ -1320,6 +1320,7 @@ reg = <0xfffffe30 0xf>; interrupts = <3 IRQ_TYPE_LEVEL_HIGH5>;
clocks = <&mck>; + u-boot,dm-pre-reloc; }; watchdog@fffffe40 { -- 2.27.0This patch, on top of v2021.04, allows my SAMA5D3 Xplained board to boot normally again.
Tested-by: Derald D. Woods <woods.technical@gmail.com mailto:woods.technical@gmail.com>
Hi Derald,
Could I ask, you are using the SPL to boot your board ? Did you have to remove any udelay from the ddr2_init code , or it booted out of the box by applying this patch only ?
With just this patch on top of v2021.04, the board booted as expected. It did not work with v2021.01. So this patch works for "v2021.04" onward. I did not touch ddr2_init code.
Derald
Thanks, Eugen