Do not pass unaligned RX buffer to the upper layers. The upper layer, especially in the ARP case, recycles the buffer and passes it back into the FEC, into it's TX path. With caches enabled, the FEC hangs on this from time to time.
Signed-off-by: Marek Vasut marex@denx.de Cc: Benoit Thebaudeau benoit.thebaudeau@advans Cc: Eric Nelson eric.nelson@boundarydevices.com Cc: Fabio Estevam festevam@gmail.com Cc: Joe Hershberger joe.hershberger@ni.com --- drivers/net/fec_mxc.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index fbfc842..7b6a997 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -31,6 +31,7 @@ #include <asm/arch/imx-regs.h> #include <asm/io.h> #include <asm/errno.h> +#include <linux/compiler.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -791,7 +792,7 @@ static int fec_recv(struct eth_device *dev) uint16_t bd_status; uint32_t addr, size; int i; - uchar buff[FEC_MAX_PKT_SIZE]; + uchar buff[FEC_MAX_PKT_SIZE] __aligned(ARCH_DMA_MINALIGN);
/* * Check if any critical events have happened