Koelsch board has three SDHI port. This adds GPIO configuration and initialization function of SDHI, and enables MMC command.
Signed-off-by: Nobuhiro Iwamatsu nobuhiro.iwamatsu.yj@renesas.com --- board/renesas/koelsch/koelsch.c | 72 +++++++++++++++++++++++++++++++++++++++++ configs/koelsch_defconfig | 1 + include/configs/koelsch.h | 7 +++- 3 files changed, 79 insertions(+), 1 deletion(-)
diff --git a/board/renesas/koelsch/koelsch.c b/board/renesas/koelsch/koelsch.c index f627433..51e70e2 100644 --- a/board/renesas/koelsch/koelsch.c +++ b/board/renesas/koelsch/koelsch.c @@ -19,6 +19,7 @@ #include <asm/gpio.h> #include <asm/arch/rmobile.h> #include <asm/arch/rcar-mstp.h> +#include <asm/arch/sh_sdhi.h> #include <netdev.h> #include <miiphy.h> #include <i2c.h> @@ -50,6 +51,14 @@ void s_init(void) #define SCIF0_MSTP721 (1 << 21) #define ETHER_MSTP813 (1 << 13)
+#define SDHI0_MSTP314 (1 << 14) +#define SDHI1_MSTP312 (1 << 12) +#define SDHI2_MSTP311 (1 << 11) + +#define SD1CKCR 0xE6150078 +#define SD2CKCR 0xE615026C +#define SD_97500KHZ 0x7 + int board_early_init_f(void) { mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125); @@ -60,6 +69,17 @@ int board_early_init_f(void) /* ETHER */ mstp_clrbits_le32(MSTPSR8, SMSTPCR8, ETHER_MSTP813);
+ /* SDHI */ + mstp_clrbits_le32(MSTPSR3, SMSTPCR3, + SDHI0_MSTP314 | SDHI1_MSTP312 | SDHI2_MSTP311); + + /* + * SD0 clock is set to 97.5MHz by default. + * Set SD1 and SD2 to the 97.5MHz as well. + */ + writel(SD_97500KHZ, SD1CKCR); + writel(SD_97500KHZ, SD2CKCR); + return 0; }
@@ -128,6 +148,58 @@ int board_eth_init(bd_t *bis) #endif }
+int board_mmc_init(bd_t *bis) +{ + int ret = -ENODEV; + +#ifdef CONFIG_SH_SDHI + gpio_request(GPIO_FN_SD0_DATA0, NULL); + gpio_request(GPIO_FN_SD0_DATA1, NULL); + gpio_request(GPIO_FN_SD0_DATA2, NULL); + gpio_request(GPIO_FN_SD0_DATA3, NULL); + gpio_request(GPIO_FN_SD0_CLK, NULL); + gpio_request(GPIO_FN_SD0_CMD, NULL); + gpio_request(GPIO_FN_SD0_CD, NULL); + gpio_request(GPIO_FN_SD2_DATA0, NULL); + gpio_request(GPIO_FN_SD2_DATA1, NULL); + gpio_request(GPIO_FN_SD2_DATA2, NULL); + gpio_request(GPIO_FN_SD2_DATA3, NULL); + gpio_request(GPIO_FN_SD2_CLK, NULL); + gpio_request(GPIO_FN_SD2_CMD, NULL); + gpio_request(GPIO_FN_SD2_CD, NULL); + + /* SDHI 0 */ + gpio_request(GPIO_GP_7_17, NULL); + gpio_request(GPIO_GP_2_12, NULL); + gpio_direction_output(GPIO_GP_7_17, 1); /* power on */ + gpio_direction_output(GPIO_GP_2_12, 1); /* 1: 3.3V, 0: 1.8V */ + + ret = sh_sdhi_init(CONFIG_SYS_SH_SDHI0_BASE, 0, + SH_SDHI_QUIRK_16BIT_BUF); + if (ret) + return ret; + + /* SDHI 1 */ + gpio_request(GPIO_GP_7_18, NULL); + gpio_request(GPIO_GP_2_13, NULL); + gpio_direction_output(GPIO_GP_7_18, 1); /* power on */ + gpio_direction_output(GPIO_GP_2_13, 1); /* 1: 3.3V, 0: 1.8V */ + + ret = sh_sdhi_init(CONFIG_SYS_SH_SDHI1_BASE, 1, 0); + if (ret) + return ret; + + /* SDHI 2 */ + gpio_request(GPIO_GP_7_19, NULL); + gpio_request(GPIO_GP_2_26, NULL); + gpio_direction_output(GPIO_GP_7_19, 1); /* power on */ + gpio_direction_output(GPIO_GP_2_26, 1); /* 1: 3.3V, 0: 1.8V */ + + ret = sh_sdhi_init(CONFIG_SYS_SH_SDHI2_BASE, 2, 0); +#endif + return ret; +} + int dram_init(void) { gd->ram_size = CONFIG_SYS_SDRAM_SIZE; diff --git a/configs/koelsch_defconfig b/configs/koelsch_defconfig index fd7a558..b1e3529 100644 --- a/configs/koelsch_defconfig +++ b/configs/koelsch_defconfig @@ -3,3 +3,4 @@ CONFIG_RMOBILE=y CONFIG_TARGET_KOELSCH=y CONFIG_DM=y CONFIG_DM_SERIAL=y +CONFIG_SH_SDHI=y diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h index f7c7b2a..1dffab1 100644 --- a/include/configs/koelsch.h +++ b/include/configs/koelsch.h @@ -89,7 +89,6 @@ #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #define CONFIG_USB_STORAGE
- /* Module stop status bits */ /* INTC-RT */ #define CONFIG_SMSTP0_ENA 0x00400000 @@ -100,4 +99,10 @@ /* SCIF0 */ #define CONFIG_SMSTP7_ENA 0x00200000
+/* SD */ +#define CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_SH_SDHI_FREQ 97500000 + #endif /* __KOELSCH_H */