-----Original Message----- From: Tudor Ambarus tudor.ambarus@linaro.org Sent: Thursday, December 5, 2024 1:20 PM To: Abbarapu, Venkatesh venkatesh.abbarapu@amd.com; u-boot@lists.denx.de; j-humphreys@ti.com Cc: Simek, Michal michal.simek@amd.com; jagan@amarulasolutions.com; vigneshr@ti.com; u-kumar1@ti.com; trini@konsulko.com; seanga2@gmail.com; caleb.connolly@linaro.org; sjg@chromium.org; william.zhang@broadcom.com; stefan_b@posteo.net; quentin.schulz@cherry.de; Takahiro.Kuwano@infineon.com; p-mantena@ti.com; git (AMD-Xilinx) git@amd.com Subject: Re: [PATCH v2] mtd: spi-nor: Enable mt35xu512aba_fixups for all mt35xx flashes
On 12/5/24 4:29 AM, Venkatesh Yadav Abbarapu wrote:
Add SPI_NOR_OCTAL_DTR_READ flags to micron flashes mt35xu01g and mt35xu02g. Also move them under CONFIG_SPI_FLASH_MT35XU config, so that in driver mt35xu512aba_fixups will be applied.
Why? What problem are you trying to solve? Should we have a fixes tag?
These two flashes mt35xu01g and mt35xu02g support DTR, so updated the flag SPI_NOR_OCTAL_DTR_READ which in turn uses this spi_nor_micron_octal_dtr_enable. Adding the support, not fixing anything. Let me know if anything missing from my side.
Why didn't you split these 2 changes in 2 dedicated patches?
Sure. Will split to two separate patches.
Thanks Venkatesh
Please read the following before submitting v3: https://docs.u-boot.org/en/latest/develop/sending_patches.html https://www.kernel.org/doc/html/latest/process/submitting-patches.html#descr... your-changes