
1 Aug
2007
1 Aug
'07
8:01 a.m.
The burst length should be 4 for DDR2 with 32 bits bus
Signed-off-by: Dave Liudaveliu@freescale.com --- cpu/mpc83xx/spd_sdram.c | 8 ++++++-- 1 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/cpu/mpc83xx/spd_sdram.c b/cpu/mpc83xx/spd_sdram.c index 647813f..5e89add 100644 --- a/cpu/mpc83xx/spd_sdram.c +++ b/cpu/mpc83xx/spd_sdram.c @@ -730,8 +730,12 @@ long int spd_sdram() sdram_cfg |= 0x10000000;
/* The DIMM is 32bit width */ - if (spd.dataw_lsb == 0x20) - sdram_cfg |= 0x000C0000; + if (spd.dataw_lsb == 0x20) { + if (spd.mem_type == SPD_MEMTYPE_DDR) + sdram_cfg |= 0x000C0000; + if (spd.mem_type == SPD_MEMTYPE_DDR2) + sdram_cfg |= 0x00080000; + }
ddrc_ecc_enable = 0;
--
1.5.3.rc2.29.gc4640f