Re: [PATCH v3] riscv: spacemit: k1: probe dram size during boot phase.

On Tue, Jan 14, 2025 at 04:01:25PM +0800, Huan Zhou wrote:

Implement functionality to probe and calculate the DRAM size during the boot phase for the RISC-V spacemit K1 platform. The `map_format_size` function extracts the memory density from a given value, while `ddr_get_density` aggregates the sizes of the memory chips. The `dram_init` function initializes the global RAM base and size based on the detected DRAM density, ensuring proper memory configuration at boot.

This commit message is a little bit too long, will be fixed in next version :(

Tested-by: Marcel Ziswiler marcel@ziswiler.com # BPI-F3 16G Signed-off-by: Huan Zhou me@per1cycle.org

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This patch introduce improvement for get dram size on spacemit k1 platform, retrieving the dram size dynamically. Have tested on Licheepi LPI3A 8G[1].

Links: [1] https://gist.github.com/per1cycle/e4eab66ebb6f83fe5118e823367fce28 .

Changes in v3:

• Remove the inline attr in arch/riscv/cpu/k1/dram.c map_format_size().
• Add detailed commit message.
• Link to v2: https://lore.kernel.org/r/20250114-get-dram-size-v2-1-aba5a281ea28@per1cycle...

Changes in v2:

• Fix bracker and return type in map_format_size() function.
• Add test log in the cover letter..
• Link to v1: https://lore.kernel.org/r/20250108-get-dram-size-v1-1-4bae32ecf756@per1cycle...

---

arch/riscv/cpu/k1/dram.c | 40 ++++++++++++++++++++++++++++++++++++++-- 1 file changed, 38 insertions(+), 2 deletions(-)

diff --git a/arch/riscv/cpu/k1/dram.c b/arch/riscv/cpu/k1/dram.c index c477c15cbfb19f0e3a0ee72985b602f5bda352d7..54d209ca277db7b304df04f81b12ae4efa400e45 100644 --- a/arch/riscv/cpu/k1/dram.c +++ b/arch/riscv/cpu/k1/dram.c @@ -4,17 +4,53 @@ */

#include <asm/global_data.h> +#include <asm/io.h> #include <config.h> +#include <bitfield.h> #include <fdt_support.h> #include <linux/sizes.h>

+#define DDR_BASE 0xC0000000 DECLARE_GLOBAL_DATA_PTR;

+static phys_size_t map_format_size(u32 val)

also this part will be rename more properly.

+{

• u32 tmp;
• if (!(val & 0x1))

• return 0;
  

• tmp = bitfield_extract(val, 16, 5);
• switch (tmp) {
• case 0xd:

• return 512;
  

• case 0xe:

• return 1024;
  

• case 0xf:

• return 2048;
  

• case 0x10:

• return 4096;
  

• case 0x11:

• return 8192;
  

• default:

• pr_info("Invalid DRAM density %x\n", val);
  

• return 0;
  

• }

+}

+phys_size_t ddr_get_density(void) +{

• phys_size_t cs0_size = map_format_size(readl((void *)DDR_BASE + 0x200));
• phys_size_t cs1_size = map_format_size(readl((void *)DDR_BASE + 0x208));
• phys_size_t ddr_size = cs0_size + cs1_size;
• return ddr_size;

+}

int dram_init(void) { gd->ram_base = CFG_SYS_SDRAM_BASE;

• /* TODO get ram size from ddr controller */
• gd->ram_size = SZ_4G;

• gd->ram_size = ddr_get_density() * SZ_1M; return 0;

}

---

base-commit: 19fc0b7f7d907119a13e9c207991899f0817f8fc change-id: 20250108-get-dram-size-65cf59a15201

Best regards,

Huan Zhou me@per1cycle.org