From: Suresh Gupta suresh.gupta@freescale.com
USB High Speed (HS) EYE Height Adjustment This patch is adding the erratum for LS1021.
Signed-off-by: Sriram Dash sriram.dash@nxp.com Signed-off-by: yinbo.zhu yinbo.zhu@nxp.com --- arch/arm/cpu/armv7/ls102xa/soc.c | 12 ++++++++++++ arch/arm/include/asm/arch-ls102xa/config.h | 4 ++++ arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 4 ++++ 3 files changed, 20 insertions(+)
diff --git a/arch/arm/cpu/armv7/ls102xa/soc.c b/arch/arm/cpu/armv7/ls102xa/soc.c index 52fb6f8..c54daee 100644 --- a/arch/arm/cpu/armv7/ls102xa/soc.c +++ b/arch/arm/cpu/armv7/ls102xa/soc.c @@ -60,6 +60,16 @@ unsigned int get_soc_major_rev(void) return major; }
+static void erratum_a009008(void) +{ +#ifdef CONFIG_SYS_FSL_ERRATUM_A009008 + u32 __iomem *scfg = (u32 __iomem *)SCFG_BASE; + u32 val = in_be32(scfg + SCFG_USB3PRM1CR / 4); + val &= ~(0xF << 6); + out_be32(scfg + SCFG_USB3PRM1CR / 4, val|(USB_TXVREFTUNE << 6)); +#endif /* CONFIG_SYS_FSL_ERRATUM_A009008 */ +} + void s_init(void) { } @@ -146,6 +156,8 @@ int arch_soc_init(void) */ out_be32(&scfg->eddrtqcfg, 0x63b20042);
+ /* Erratum */ + erratum_a009008(); return 0; }
diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h index 2f7233f..5b89f16 100644 --- a/arch/arm/include/asm/arch-ls102xa/config.h +++ b/arch/arm/include/asm/arch-ls102xa/config.h @@ -110,6 +110,10 @@
#ifdef CONFIG_LS102XA #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 +#define CONFIG_SYS_FSL_ERRATUM_A008378 +#define CONFIG_SYS_FSL_ERRATUM_A009663 +#define CONFIG_SYS_FSL_ERRATUM_A009008 +#define CONFIG_SYS_FSL_ERRATUM_A009942 #define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1 #else #error SoC not defined diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h index c34fd63..f474cfd 100644 --- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h +++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h @@ -172,6 +172,10 @@ struct ccsr_gur { #define SCFG_PMCINTECR_ETSECERRG0 0x00080000 #define SCFG_PMCINTECR_ETSECERRG1 0x00040000 #define SCFG_CLUSTERPMCR_WFIL2EN 0x80000000 +#define SCFG_BASE 0x01570000 +#define SCFG_USB3PRM1CR 0x070 +#define USB_TXVREFTUNE 0x9 +
/* Supplemental Configuration Unit */ struct ccsr_scfg {