On 09/25/2015 05:32 AM, Gong Qianyu wrote:
From: Mingkai Hu Mingkai.Hu@freescale.com
Freescale LayerScape with Chassis Generation 2 is a set of SoCs with ARMv8 cores and 2rd generation of Chassis.
Signed-off-by: Li Yang leoli@freescale.com Signed-off-by: Hou Zhiqiang B48286@freescale.com Signed-off-by: Mingkai Hu Mingkai.Hu@freescale.com Signed-off-by: Gong Qianyu Qianyu.Gong@freescale.com
V3:
- Update MMU table initialization to match the latest code.
- Remove some dead code
- Rename #include<asm/arch-fsl-lsch2/xxx> to #include<asm/arch/xxx>
arch/arm/cpu/armv8/Makefile | 1 + arch/arm/cpu/armv8/fsl-lsch2/Makefile | 12 + arch/arm/cpu/armv8/fsl-lsch2/README | 10 + arch/arm/cpu/armv8/fsl-lsch2/cpu.c | 527 ++++++++++++++++++++++
NACK. Do NOT duplicate massive code. Please consolidate fsl-lsch3 and fsl-lsc2 and move common code out.
York