8 Jul
2012
8 Jul
'12
11:31 p.m.
Dear Ilya Yanok,
Dear Marek,
On Sun, Jul 8, 2012 at 10:59 PM, Marek Vasut marek.vasut@gmail.com wrote:
btw. this will fail with cache line < 32 .
Hm.. I have to admit I'm not very much into USB specs and I don't have any non-ARMv7 system now to do some testing... But it used to work without any alignment, right? (with disabled dcache, of course) That makes me think that data buffers don't need any alignment (from USB pov, not cache) and 32-byte alignment is required for internal structs only.
See ehci-r10.pdf ... chapter 3.5 ... the buffer pointer has to be aligned too it seems.
Regards, Ilya.
Best regards, Marek Vasut