Re: [U-Boot] [PATCH v2 3/3] x86: cougarcanyon2: Add missing chipset interrupt information

On 12 June 2018 at 02:26, Bin Meng bmeng.cn@gmail.com wrote:

Add Panther Point chipset interrupt pin/PIRQ information, and enable the generation of PIRQ routing table and MP table.

Signed-off-by: Bin Meng bmeng.cn@gmail.com

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Changes in v2:

• add the PIRQ register mapping via "intel,pirq-regmap" property

arch/x86/dts/cougarcanyon2.dts | 46 +++++++++++++++++++++++++++++++++++++++++ configs/cougarcanyon2_defconfig | 2 ++ 2 files changed, 48 insertions(+)

Reviewed-by: Simon Glass sjg@chromium.org