Wolfgang,
Here is a patch to fix a couple MPC85xx ADS PCI bugs. It should apply against current CVS with ``patch -p 2''.
* Patch by Jon Loeliger 24-Aug-2004 Fix PCI window to be like Linux on MPC85xx and remove some unneeded PCI initialization from board_early_init_f(). Provide SW workaround for PCI initialization on 85xx CDS Removed TULIP card from default PCI config.
Thanks, jdl
diff -ruN --exclude=CVS u-boot-public-cvs/u-boot-20040823/board/mpc8540ads/mpc8540ads.c internal-development/u-boot-pq3/board/mpc8540ads/mpc8540ads.c --- u-boot-public-cvs/u-boot-20040823/board/mpc8540ads/mpc8540ads.c 2004-08-01 18:02:46.000000000 -0500 +++ internal-development/u-boot-pq3/board/mpc8540ads/mpc8540ads.c 2004-08-06 15:11:23.000000000 -0500 @@ -44,13 +44,6 @@
int board_early_init_f (void) { -#if defined(CONFIG_PCI) - volatile immap_t *immr = (immap_t *)CFG_IMMR; - volatile ccsr_pcix_t *pci = &immr->im_pcix; - - pci->peer &= 0xffffffdf; /* disable master abort */ -#endif - return 0; }
diff -ruN --exclude=CVS u-boot-public-cvs/u-boot-20040823/board/mpc8560ads/mpc8560ads.c internal-development/u-boot-pq3/board/mpc8560ads/mpc8560ads.c --- u-boot-public-cvs/u-boot-20040823/board/mpc8560ads/mpc8560ads.c 2004-08-01 18:02:46.000000000 -0500 +++ internal-development/u-boot-pq3/board/mpc8560ads/mpc8560ads.c 2004-08-06 15:11:08.000000000 -0500 @@ -214,13 +214,6 @@
int board_early_init_f (void) { -#if defined(CONFIG_PCI) - volatile immap_t *immr = (immap_t *)CFG_IMMR; - volatile ccsr_pcix_t *pci = &immr->im_pcix; - - pci->peer &= 0xffffffdf; /* disable master abort */ -#endif - return 0; }
diff -ruN --exclude=CVS u-boot-public-cvs/u-boot-20040823/cpu/mpc85xx/pci.c internal-development/u-boot-pq3/cpu/mpc85xx/pci.c --- u-boot-public-cvs/u-boot-20040823/cpu/mpc85xx/pci.c 2004-08-01 18:02:54.000000000 -0500 +++ internal-development/u-boot-pq3/cpu/mpc85xx/pci.c 2004-08-18 16:41:43.000000000 -0500 @@ -77,7 +77,7 @@ pcix->powbear1 = 0x00000000; pcix->powar1 = 0x8004401c; /* 512M MEM space */
- pcix->potar2 = (CFG_PCI1_IO_BASE >> 12) & 0x000fffff; + pcix->potar2 = 0x00000000; pcix->potear2 = 0x00000000; pcix->powbar2 = (CFG_PCI1_IO_BASE >> 12) & 0x000fffff; pcix->powbear2 = 0x00000000; @@ -85,12 +85,38 @@
pcix->pitar1 = 0x00000000; pcix->piwbar1 = 0x00000000; - pcix->piwar1 = 0xa0F5501f; + pcix->piwar1 = 0xa0f5501e; /* Enable, Prefetch, Local Mem, + * Snoop R/W, 2G */
/* * Hose scan. */ pci_register_hose(hose); + +#if defined(CONFIG_MPC8555CDS) || defined(CONFIG_MPC8541CDS) + /* + * This is a SW workaround for an apparent HW problem + * in the PCI controller on the MPC85555/41 CDS boards. + * The first config cycle must be to a valid, known + * device on the PCI bus in order to trick the PCI + * controller state machine into a known valid state. + * Without this, the first config cycle has the chance + * of hanging the controller permanently, just leaving + * it in a semi-working state, or leaving it working. + * + * Pick on the Tundra, Device 17, to get it right. + */ + { + u8 header_type; + + pci_hose_read_config_byte(hose, + PCI_BDF(0,17,0), + PCI_HEADER_TYPE, + &header_type); + } + +#endif + hose->last_busno = pci_hose_scan(hose); }