In order for i2c_num==4 and 5 to stay invalid for non-imx8mp SOCs, the i2c_ccgr[] array must be sized by the number of initializers present, not with a hard-coded 6 which would implicitly initialize the last two elements with zeroes.
Also, the bounds check is off-by-one.
Fixes: c92c3a4453b8 "ARM: imx: imx8mp: Enable support for i2c5 and i2c6 on i.MX8MP" Signed-off-by: Rasmus Villemoes rasmus.villemoes@prevas.dk --- arch/arm/mach-imx/imx8m/clock_imx8mm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mm.c b/arch/arm/mach-imx/imx8m/clock_imx8mm.c index 1f69047988..b0361944b4 100644 --- a/arch/arm/mach-imx/imx8m/clock_imx8mm.c +++ b/arch/arm/mach-imx/imx8m/clock_imx8mm.c @@ -36,14 +36,14 @@ void enable_ocotp_clk(unsigned char enable)
int enable_i2c_clk(unsigned char enable, unsigned i2c_num) { - u8 i2c_ccgr[6] = { + u8 i2c_ccgr[] = { CCGR_I2C1, CCGR_I2C2, CCGR_I2C3, CCGR_I2C4, #if (IS_ENABLED(CONFIG_IMX8MP)) CCGR_I2C5_8MP, CCGR_I2C6_8MP #endif };
- if (i2c_num > ARRAY_SIZE(i2c_ccgr)) + if (i2c_num >= ARRAY_SIZE(i2c_ccgr)) return -EINVAL;
clock_enable(i2c_ccgr[i2c_num], !!enable);