
7 Oct
2010
7 Oct
'10
4:57 p.m.
On Sep 30, 2010, at 9:11 AM, Kumar Gala wrote:
From: Emil Medve Emilian.Medve@freescale.com
- Make the U-Boot update command sequence conditional. Helps prevent
accidental erasing if an upload or previous step fails
- Make it easier to update other FLASH banks
- Enable DDR controller cache line interleaving and bank cs0/cs1 by default
Signed-off-by: Emil Medve Emilian.Medve@Freescale.com Signed-off-by: York Sun yorksun@freescale.com Signed-off-by: Kumar Gala galak@kernel.crashing.org
include/configs/corenet_ds.h | 15 +++++++++------ 1 files changed, 9 insertions(+), 6 deletions(-)
applied to 85xx
- k