With split config this does not build due to the missing symbols. Add them and fix the PCI condition.
Signed-off-by: Simon Glass sjg@chromium.org ---
(no changes since v1)
arch/x86/cpu/Makefile | 2 +- configs/chromebook_coral_defconfig | 3 +++ 2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/x86/cpu/Makefile b/arch/x86/cpu/Makefile index 16e67e3da24..6f36281c970 100644 --- a/arch/x86/cpu/Makefile +++ b/arch/x86/cpu/Makefile @@ -63,7 +63,7 @@ ifndef CONFIG_$(SPL_)X86_64 obj-$(CONFIG_$(SPL_)SMP) += mp_init.o endif obj-y += mtrr.o -obj-$(CONFIG_PCI) += pci.o +obj-$(CONFIG_PPL_PCI) += pci.o ifndef CONFIG_$(SPL_)X86_64 obj-$(CONFIG_SMP) += sipi_vector.o endif diff --git a/configs/chromebook_coral_defconfig b/configs/chromebook_coral_defconfig index 401506e2193..f5995f22004 100644 --- a/configs/chromebook_coral_defconfig +++ b/configs/chromebook_coral_defconfig @@ -87,6 +87,7 @@ CONFIG_TFTP_TSIZE=y CONFIG_USE_ROOTPATH=y CONFIG_REGMAP=y CONFIG_SYSCON=y +CONFIG_TPL_SIMPLE_BUS=y CONFIG_SPL_OF_TRANSLATE=y CONFIG_LBA48=y CONFIG_SYS_64BIT_LBA=y @@ -96,6 +97,8 @@ CONFIG_SYS_I2C_DW=y CONFIG_MISC=y CONFIG_CROS_EC=y CONFIG_CROS_EC_LPC=y +CONFIG_SPL_P2SB=y +CONFIG_TPL_P2SB=y CONFIG_SPI_FLASH_WINBOND=y # CONFIG_X86_PCH7 is not set # CONFIG_X86_PCH9 is not set