On Mar 15, 2011, at 9:10 PM, Shaohui Xie wrote:
PBL(pre-boot loader): SPI flash used as RCW(Reset Configuration Word) and PBI(pre-boot initialization) source, CPC(CoreNet Platform Cache) used as 1M SRAM where PBL will copy whole U-BOOT image to, U-boot can boot from CPC after PBL completes RCW and PBI phases.
Signed-off-by: Chunhe Lan b25806@freescale.com Signed-off-by: Mingkai Hu Mingkai.hu@freescale.com Signed-off-by: Shaohui Xie b21989@freescale.com Signed-off-by: Roy Zang tie-fei.zang@freescale.com
arch/powerpc/cpu/mpc85xx/cpu_init.c | 19 +++++++++++++++++++ board/freescale/corenet_ds/tlb.c | 12 +++++++++++- boards.cfg | 1 + include/configs/corenet_ds.h | 27 ++++++++++++++++++++++++++- 4 files changed, 57 insertions(+), 2 deletions(-)
applied to 85xx
- k