
Hi Lukas,
On Tue, Dec 11, 2018 at 7:17 AM Auer, Lukas lukas.auer@aisec.fraunhofer.de wrote:
Hi Bin,
On Fri, 2018-12-07 at 06:14 -0800, Bin Meng wrote:
RISC-V privileged architecture v1.10 defines a real-time counter, exposed as a memory-mapped machine-mode register - mtime. mtime must run at constant frequency, and the platform must provide a mechanism for determining the timebase of mtime. The mtime register has a 64-bit precision on all RV32, RV64, and RV128 systems.
Different platform may have different implementation of the mtime block hence an API riscv_get_time() is required by this driver for platform codes to hide such implementation details. For example, on some platforms mtime is provided by the CLINT module, while on some other platforms a simple 'rdtime' can be used to get the timer counter.
With this timer driver the U-Boot timer functionalities like delay works correctly now.
Signed-off-by: Bin Meng bmeng.cn@gmail.com
Changes in v2:
- remove the probe to syscon driver in the timer probe, to make the driver generic, and rely on platform codes to provide the API riscv_get_time().
drivers/timer/Kconfig | 8 +++++++ drivers/timer/Makefile | 1 + drivers/timer/riscv_timer.c | 57 +++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 66 insertions(+) create mode 100644 drivers/timer/riscv_timer.c
diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig index b0e6f32..8995979 100644 --- a/drivers/timer/Kconfig +++ b/drivers/timer/Kconfig @@ -126,6 +126,14 @@ config OMAP_TIMER help Select this to enable an timer for Omap devices.
+config RISCV_TIMER
bool "RISC-V timer support"
depends on RISCV && TIMER
select RISCV_CLINT
Since we have one generic timer for RISC-V now, I don't think it makes sense to specifically select the CLINT here.
Ah, yes!
help
Select this to enable support for the timer as defined
by the RISC-V privileged architecture spec v1.10.
nit: should we explicitly mention the version here? v1.11 will also include the mtime CSR, for example. This is not really important, just noticed it now.
OK, will remove it in v3.
Looks good otherwise.
Reviewed-by: Lukas Auer lukas.auer@aisec.fraunhofer.de
Regards, Bin